Commit graph

25,525 commits

Author SHA1 Message Date
Martí Bolívar
6e8775ff84 devicetree: remove DT_HAS_NODE_STATUS_OKAY
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:

- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
  for macros which are equivalent to
  DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name

Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.

This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-13 18:24:42 +02:00
Peter Bigot
4f16b419e8 device: avoid casting away const from config_info pointer
The driver-specific config_info structure referenced from the device
structure is marked const.  Some drivers fail to preserve that
qualifier when casting the pointer to the driver-specific structure,
violating MISRA 11.8.

Changes produced by scripts/coccinelle/const_config_info.cocci.

Some changes proposed by the script are not included because they
reveal mutation of state through the const pointer, though the
code works as long as the driver-specific object is defined without
the const qualifier.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-05-13 18:21:52 +02:00
Francois Ramu
1a163673c7 drivers: spi: driver reloading dma buffers in the main transceive loop
With this change, the spi transceive with dma function
waits for the spi busy flag reset and for the dma transfer end.
Then it reloads the channels until all buffers are consumed.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-13 16:22:10 +02:00
Francois Ramu
c83e2a41ae drivers: spi: driver dma callback function to set transfer flag
This change avoids the reload of the dma channel
in the callback function, just sets the corresponding Tx, Rx flag.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-13 16:22:10 +02:00
Johann Fischer
5a3d44256e drivers: usb_dc_sam: free endpoint memory on End of Reset event
Free endpoint memory on End of Reset event (EORST).

Fixes: #24626

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-05-13 11:13:36 +02:00
Johann Fischer
29d95ba1d4 drivers: usb_dc_sam: tweak logging for enable, disable, configure
Tweak logging for enable, disable, configure.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-05-13 11:13:36 +02:00
Gerson Fernando Budke
9a37154151 drivers: wifi: esp: Update to new timeout api
Update to new timeout api.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-05-12 17:18:34 +02:00
Anas Nashif
8ec88164ac i2c: shell: add braces around if statement
Add braces around if statements per coding guideline.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-05-10 17:49:30 +02:00
Simon Glass
9360150c0c i2c_shell: Add write/read multiple-byte commands
Allow writing multiple registers (or a single 16-bit register) and
reading multiple registers.

   i2c read I2C_2 36 40
   00000000: 12 34 00 00 0F 3D 80 80 AF 9C 17 00 90 01 00 00

   i2c write I2C_2 36 40 12 34 56 78 90 12 34 56 78 90

   i2c read I2C_2 36 40
   00000000: 12 34 00 00 90 12 80 80 AF 9C 17 00 90 01 00 00

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10 17:49:30 +02:00
Anas Nashif
ffd568db09 i2c_shell: Add write_byte/read_byte commands
Add simple commands to read or write a single byte from a device
register.

   i2c write_byte I2C_2 36 b0 12
   i2c read_byte I2C_2 36 0
   Output: 0x82

I modified Anas' version to put args in variables first so that the code
is self-documenting.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10 17:49:30 +02:00
Anas Nashif
0ecc71ccb2 i2c_shell: Tidy up the code style
Fix some code-style nits in this file.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10 17:49:30 +02:00
Xavier Chapron
2a8ff02ef2 drivers: Replace printf by printk when applicable
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
2020-05-09 21:25:33 +02:00
Kumar Gala
df56ce3efb drivers: ethernet: mcux: rework how unique mac is determined
Instead of having a Kconfig property, if there is no local-mac-address
property in the devicetree than we'll generate a unique MAC address
based on unique ID registers on the SoC.

We remove the local-mac-address properties in the SoC dtsi files to
match the default behavior that existed before (ie, unique MAC address)

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 16:29:57 +02:00
Kumar Gala
b19cf0bed3 drivers: eth: Get Manual MAC address from devicetree
Move from a Kconfig to select/initialize the MAC address to using the
"local-mac-address" property in devicetree.  If the property is set the
drivers will initialize the mac-address from the devicetree (unless the
mac address is all 0's).  The MAC address might get overwritten by
either a driver specific means or by the setting of
"zephyr,random-mac-address" in the devicetree.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 16:29:57 +02:00
Kumar Gala
1de61b4c42 drivers: eth: Replace driver specific RANDOM_MAC Kconfig with devicetree
Utilize the devicetree property "zephyr,random-mac-address" to determine
if a driver should use a random mac address and remove the associated
Kconfig options that enabled this feature.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 16:29:57 +02:00
Kumar Gala
8178f76470 drivers: eth: Refactor generation of random mac into help function
Rather than having each driver have its own slightly different way of
generating a random mac address, add a helper function that they all can
call so we do it one way.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 16:29:57 +02:00
Parthiban Nallathambi
f4adfd52cb drivers: serial: add XMC seris UART support
Add infineon XMC4 series UART support. Driver supports
only poll mode using XMCLib.

Out of 4 available UART's on SoC, only UART1 is confgired
by default in UART mode until GPIO & pinctrl support.

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-05-09 14:21:44 +02:00
Jose Alberto Meza
eaaf1af79e drivers: espi: mchp: Report correct length during OOB Rx operation
Use correct HAL macro to report amount of bytes received.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-05-09 07:20:13 -04:00
Erwan Gouriou
6ea53792f4 modules: stm32: Rename lib Kconfig symbol
Both ST and STM32 modules where using same HAS_STLIB Kconfig
symbol.
Now that each module is createing is own lib, we need to be able
to distinguish libs.

Depends on zephyrproject-rtos/hal_stm32/pull/52

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-05-09 13:08:42 +02:00
Albin Söderqvist
35c4838425 drivers: display: st7789v: add power management support
This adds sleep mode along with power managament control.

Signed-off-by: Albin Söderqvist <albin.soderqvist@endian.se>
2020-05-09 13:07:17 +02:00
Kumar Gala
db725c0ec9 drivers: Replace GPIO_CS Kconfig with devicetree detection
Use DT_INST_SPI_DEV_HAS_CS_GPIOS() in drivers to determine if we should
utilize CS_GPIO base SPI chipselect handling.  This allows us to remove
Kconfig option for this feature.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 13:07:05 +02:00
Bilal Wasim
1966d48498 drivers: wifi: eswifi: WiFi Scan completion indication
Updating the eswifi driver to indicate "scan completion"
to WiFi Management once scanning is done.

Tested with STM32 disco IOT kit.

Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
2020-05-09 13:06:26 +02:00
Zide Chen
e8b6b86704 interrupt_controller: device driver can configure IO APIC delivery mode
Currently all IO APIC interrupts are configured at fixed delivery mode,
which is good for HEPT timer interrupt but it imposes burdens to
device drivers to properly handle the repeated interrupt sent to all
processors.

This patch makes it more flexible so that device drivers can specify
the delivery mode it desires in the IRQ connect APIs.

- Don't hard code IOAPIC_FIXED in z_ioapic_irq_set(), meaning the
  IRQ delivery mode is passed in from the 'flags' argument and
  individual device driver needs to choose delivery mode for its own
  IO APIC interrupt.

- To support different delivery mode in different IO APIC interrupts,
  need to save and restore RTE[10:8] during IOAPIC suspend and resume.

If device driver doesn't pass either IOAPIC_FIXED or IOAPIC_LOWEST
in IRQ_CONNECT()/irq_connect_dynamic() alike APIs, the delivery mode
bit fields in the target RTE register are '0' which implies fixed mode.
If the device driver wants the interrupt to be delivered to one CPU
only, it needs to explicitly specify IOAPIC_LOWEST in one of the IRQ
connect APIs.

Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-05-08 22:32:39 -04:00
Zide Chen
ae1137f241 interrupt_controller: change IO APIC to logical destination mode
Currently IO APIC is working in physical destination mode, which
doesn't support interrupt to be delivered to multiple local APICs.
By definition only 4 bits [59:63] in IO APIC IOREDTBL register are
available for destination addresses and it contains an APIC ID only.

This patch changes it to logical destination mode so that IOREDTBL
can potentially define a set of processors and it's posible to deliver
interrupts to multiple APICs.

Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-05-08 22:32:39 -04:00
Zide Chen
d27f6cb5eb interrupt_controller: program local APIC LDR register for xAPIC
If IO APIC is in logical destination mode, local APICs compare their
logical APIC ID defined in LDR (Logical Destination Register) with
the destination code sent with the interrupt to determine whether or not
to accept the incoming interrupt.

This patch programs LDR in xAPIC mode to support IO APIC logical mode.

The local APIC ID from local APIC ID register can't be used as the
'logical APIC ID' because LAPIC ID may not be consecutive numbers hence
it makes it impossible for LDR to encode 8 IDs within 8 bits.

This patch chooses 0 for BSP, and for APs, cpu_number which is the index
to x86_cpuboot[], which ultimately assigned in z_smp_init[].

Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-05-08 22:32:39 -04:00
Kumar Gala
c2135f8721 devicetree: DT_NODE_HAS_COMPAT_STATUS_OKAY -> DT_NODE_HAS_COMPAT_STATUS
Swap this out and make the status a parameter.
Leave a couple of cases of DT_NODE_HAS_COMPAT().

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-08 19:37:18 -05:00
Martí Bolívar
17b8667197 dts: clean up some redundant DT checks
These are redundantly checking a node's status twice.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-08 19:37:18 -05:00
Martí Bolívar
7e0eed9235 devicetree: allow access to all nodes
Usually, we want to operate only on "available" device
nodes ("available" means "status is okay and a matching binding is
found"), but that's not true in all cases.

Sometimes we want to operate on special nodes without matching
bindings, such as those describing memory.

To handle the distinction, change various additional devicetree APIs
making it clear that they operate only on available device nodes,
adjusting gen_defines and devicetree.h implementation details
accordingly:

- emit macros for all existing nodes in gen_defines.py, regardless
  of status or matching binding
- rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY
- rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY
- rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY
- rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY
- rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS
- resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS
- remove DT_COMPAT_ON_BUS as a public API
- use the new default_prop_types edtlib parameter

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-08 19:37:18 -05:00
Kumar Gala
5cf85fa229 drivers: move nxp_kinetis_temp to for-each style
Move to FOREACH to prepare for an upcoming patch.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-08 19:37:18 -05:00
Henrik Brix Andersen
338cecbe1a drivers: i2c: shell: add I2C bus recovery shell command
Add I2C shell command for initiating a bus recovery.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-05-09 01:15:30 +02:00
Henrik Brix Andersen
6aa8a83682 drivers: i2c: gpio: add bus recovery function
Add I2C bus recovery function to the I2C GPIO bitbang driver.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-05-09 01:15:30 +02:00
Henrik Brix Andersen
ec90af8e78 drivers: i2c: bitbang: add helper method for I2C bus recovery
Add I2C bitbang helper function for performing bus recovery.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-05-09 01:15:30 +02:00
Henrik Brix Andersen
71b893056f drivers: i2c: add I2C bus recovery API
Add API for recovering an I2C bus. This API can be used to recover
from situations where the I2C master and one or more I2C slaves are
out of synchronization (e.g. if the I2C master was reset in the middle
of an I2C transaction or if a noise pulse was induced on the SCL
line).

Fixes #23441.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-05-09 01:15:30 +02:00
Tomasz Bursztyka
c0ab0de8d1 drivers/interrupt_controller: Rename ioapic init function
The '_' is not necessary, plus it makes the sys init object name
aligning with all others.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-05-08 23:07:44 +02:00
Tomasz Bursztyka
dfe938640b drivers/interrupt_controller: Fix loapic/ioapic header inclusion
s/init.h/device.h

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-05-08 23:07:44 +02:00
Tomasz Bursztyka
48135cdd34 usermode: Rework Z_SYSCALL_SPECIFIC_DRIVER to fit with device refactoring
init_fn is not anymore part of struct device, so let's test instead the
driver's API structure pointer which is also unique per device driver.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-05-08 23:07:44 +02:00
Tomasz Bursztyka
97326c0445 device: Fix structure attributes access
Since struct devconfig was merged earlier into struct device, let's fix
accessing config_info, name, ... attributes everywhere via:

grep -rlZ 'dev->config->' | xargs -0 sed -i 's/dev->config->/dev->/g'

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-05-08 23:07:44 +02:00
Tomasz Bursztyka
8d7bb8ffd8 device: Refactor device structures
When the device driver model got introduced, there were no concept of
SYS_INIT() which can be seen as software service. These were introduced
afterwards and reusing the device infrastructure for simplicity.
However, it meant to allocate a bit too much for something that only
required an initialization function to be called at right time.

Thus refactoring the devices structures relevantly:
- introducing struct init_entry which is a generic init end-point
- struct deviceconfig is removed and struct device owns everything now.
- SYS_INIT() generates only a struct init_entry via calling
  INIT_ENTRY_DEFINE()
- DEVICE_AND_API_INIT() generates a struct device and calls
  INIT_ENTRY_DEFINE()
- init objects sections are in ROM
- device objects sections are in RAM (but will end up in ROM once they
  will be 'constified')

It also generate a tiny memory gain on both ROM and RAM, which is nice.

Perhaps kernel/device.c could be renamed to something more relevant.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-05-08 23:07:44 +02:00
Emil Obalski
38aea280e7 usb: Sync receiving data from ISO OUT endpoint with SOF
This commit adds support for receiveing data from ISO OUT endpoint
for NRF devices. NRF USB IP core does not generate IRQ when
data are received on ISO OUT endpoint and it must be synchronized
with SOF event.

Enable SOF handling by default if usb audio is configured
with NRF devices.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
2020-05-08 15:12:27 +02:00
Emil Obalski
9e998d108a drivers: usb: Correct naming for endpoint Transfer Type
This commit updates definitions to better match usb 2.0 spec.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
2020-05-08 15:12:27 +02:00
Emil Obalski
79704fac5a usb: ISO endpoint size may not be power of 2.
By this commit exception for ISO endpoints is made when it comes
to its size. ISO endpoint buffer size for nrf devices is 1023 and
may be configured with variable length size. NRFX checks is size
is chosen accordingly and it is no reason to do it in SHIM.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
2020-05-08 15:12:27 +02:00
Johann Fischer
dba19333d2 drivers: ssd16xx: rework initialization of the controller memory
Revise how the unusable memory area is treated.

Do not use SPI interface directly but ssd16xx_write_cmd().
This will allow a common SPI interface to be implemented
in the future.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-05-08 15:11:10 +02:00
Carles Cufi
b67a31e411 Bluetooth: controller: Remove legacy LL
Remove the legacy Link Layer implementation.

Closes #24187.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2020-05-08 15:07:00 +02:00
Alberto Escolar Piedras
cd0659e36f util.h: Remove INLINE definition and user
INLINE is a very common macro, just like MAX or MIN.
Defining it always can easily collide with libraries or
application headers.
And option would be to add a ifdef guard around it,
But it was used in only 1 place in Zephyr, instead
of keeping it just for that, remove it.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2020-05-08 08:37:21 -04:00
Sahaj Sarup
351f39f9cd board: arm: Add Support For 96Boards Aerocore2
Changes:

- Added all required board files in /boards/arm/96b_aerocore2
- Modified pinmux for stm32f4

Most of the changes in this PR is based on reverse-engineering of the
PCB layout and following commits in the PX4 firmware repository for
the same board. The manufacturer does not provide and or generate
schematics and pinout tables for this board.

This PR includes almost all of the interfaces connected to the STM32
MCU, the only thing not included is the J9 and J8 headers that connect
to a 96Boards baseboard.
These headers are not vital to the functionality of the Aerocore2.

Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
2020-05-08 07:33:43 -05:00
Helge Juul
dc0c938359 boards: arm: stm32f746g_disco: enable sdmmc support
Update dtsi and pinmux macros for stm32f7 family. Add sdmmc1 to dts file
for stm32f746g_disco. Also add board specific configuration file for
fat_fs sample.

Signed-off-by: Helge Juul <helge@fastmail.com>
2020-05-08 10:53:10 +02:00
Anthony Brandon
a71f77e601 boards: arm: stm32l496g_disco: enable sdmmc support
Update the dtsi for stm32l471 (which the higher SoCs are based on) to
support the stm32-sdmmc disk access device. Enable the device for the
stm32l496g_disco board, and update the pinmuxing.
Note that the stm32l496g_disco board also has a card detect gpio
(MFX_GPIO8), but this is not supported yet. When not specified the
driver will assume a card is present.

Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
2020-05-08 10:53:10 +02:00
Erwan Gouriou
c4d9de1850 drivers/clock_control: stm32: msi: Enable MSI range config in PLL mode
When MSI clock is used a source of PLL, it should be possible to
select its frequency range. Fix this.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-05-08 00:34:34 -05:00
Erwan Gouriou
4b3d79f1bb drivers: stm32: Add pinmux headers for stm32l5
Copy/pasted from L4 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-05-08 00:34:34 -05:00
Erwan Gouriou
cdd5856167 driver/gpio: stm32: Add STM32L5 support
Add basic GPIO support. Regarding interface with EXTI,
STM32L5 is similar to STM32G0.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-05-08 00:34:34 -05:00