Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
The interrupt triggering on both edges is a remnant from the old
Quark SE which has a customized DesignWare GPIO block. So remove
the support for both edges as the board is no longer supported.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The MCUX GPIO peripheral must be configured as either input or output.
Reject attempts to configure disconnected or bidirectional.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change when we clear interrupt status to happen before we handle the
callbacks. As the callbacks might manipluate the GPIO state and cause
a GPIO interrupt. If we clear interrupt status after than we might
miss an interrupt.
Also only clear interrupts for interrupts that are we have enabled and
that were reported when we read from the interrupt status.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Tested on frdm_k64f board.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Tested on nrf52840_pca10056 board.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Tested on sam_e70_xplained board.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Tested on efr32_slwstk6061a board.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Both pin sets and values encoding pin values are ultimately represented
by 32-bit unsigned integers. Provide typedefs that make the role of a
parameter explicit.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit moves interrupt configuration for a single pin from
gpio_pin_configure to gpio_pin_interrupt_configure function.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit adds following functions which work with pin logical levels
(take into account GPIO_ACTIVE_LOW flag):
- gpio_port_get, gpio_port_set_masked, gpio_port_set_bits,
gpio_port_clear_bits, gpio_port_set_clr_bits
- gpio_pin_get, gpio_pin_set
Functions which work with pin physical levels:
- gpio_port_get_raw, gpio_port_set_masked_raw, gpio_port_set_bits_raw,
gpio_port_clear_bits_raw, gpio_port_set_clr_bits_raw
- gpio_pin_get_raw, gpio_pin_set_raw
As well as functions:
- gpio_port_toggle_bits, gpio_pin_toggle_bits
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
When building the i2s tests on 96b_argonkey we get the following
warnings:
drivers/dma/dma_stm32.c: In function 'dma_stm32_configure':
drivers/dma/dma_stm32.c:181:2: error: 'periph_addr_adj' may be used
uninitialized in this function [-Werror=maybe-uninitialized]
181 | switch (increment) {
| ^~~~~~
drivers/dma/dma_stm32.c:161:2: error: 'memory_addr_adj' may be used
uninitialized in this function [-Werror=maybe-uninitialized]
161 | switch (increment) {
| ^~~~~~
Fix by initialzing periph_addr_adj and memory_addr_adj to 0.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The current sam spi driver uses soc dependent name which duplicate
configuration to enable other platforms. This refactor current
definitions to a generic way to reuse symbols by multi soc definitions.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
spi_context_lock() & spi_context_release() are called in transceive()
function for a better readability.
Signed-off-by: Ismael Fillonneau <ismael.fillonneau@stimio.fr>
riscv64 CPUs can access full 64-bit memory-mapped register by a single
instruction, so we can directly access these registers.
Signed-off-by: Jim Shu <cwshu@andestech.com>
Watchdog type is found on e.g. Pearl/Jade Gecko, often
more than 1 is present.
Driver supports timeout and (minimum) window configuration
and reset or timeout interrupt support for now.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
Gain values are specified with enumeration values that can't be used
to reverse the effects of scaling the input signal. Provide a
function that reverses the effect of the gain by scaling a measured
value.
Also provide a function that converts a raw measurement captured with
a reference voltage and specific gain and resolution to the
corresponding voltage in millivolts.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Introduces a new ft5336 touch panel driver for the keyboard scan (kscan)
interface. The driver currently uses a timer to periodically poll touch
data in the system work queue, but later it can be enhanced to use a
gpio interrupt instead of a timer.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
ARM cores may have a per-core architected timer, which provides per-cpu
timers, attached to a GIC to deliver its per-processor interrupts via
PPIs. This is the most common case supported by QEMU in the virt
platform.
This patch introduces support for this timer abstracting the way the
timer registers are actually accessed. This is needed because different
architectures (for example ARMv7-R vs ARMv8-A) use different registers
and even the same architecture (ARMv8-A) can actually use different
timers (ELx physical timers vs ELx virtual timers).
So we introduce the common driver here but the actual SoC / architecture
/ board must provide the three helpers (arm_arch_timer_set_compare(),
arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file
imported through the arch/cpu.h header file.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Lot of misdefined variables that went in undetected due to lack of CI on
this board. Fix them and test build with new SDK.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
