Commit graph

24538 commits

Author SHA1 Message Date
Krzysztof Chruscinski
a348cec400 drivers: clock_control: Change clock_control_async_on parameters
Stable API change: modify parameters of clock_control_async_on which
previously took a structure which contains list node, callback and user
context. Removing list node and replacing structure with two parameters:
callback and user context. List node is removed because it has no use
in current API.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-10-14 14:06:56 +02:00
Krzysztof Chruscinski
db6bfde8b3 drivers: serial: nrfx_uarte: Refactoring poll_out
Refactoring poll_out to be ready for handling preemption. uart_tx and
uart_fifo_fill modified so they are resilient to being preempted by
uart_poll_out.

Refactored uart_poll_out implementation to be common for interrupt
driven API and asynchronous API. In both APIs active state is detected
by evaluating state of ENDTX and TXSTOPPED events. If anyone is set it
means that new transfer can be started.

Patch is fixing existing issues:
- potential bytes dropping with flow control enabled
- busywaiting for ENDTX (asynchronous API) - poor performance
- potential bytes dropping during preemption
- potential uart_tx returning -EBUSY when interrupted poll_out

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-10-14 14:06:25 +02:00
Thorvald Natvig
4d0750920b drivers: ethernet: eth_gecko: Fetch MAC address from device info
If neither a random address nor a specific local address is in the
device tree, then use the MAC address from the device information page.

Signed-off-by: Thorvald Natvig <thorvald@natvig.com>
2020-10-14 12:31:49 +03:00
Ryan Erickson
72d54055a3 drivers: modem: hl7800: UDP socket not closed
Ensure UDP socket is always closed when offload_put is called.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2020-10-14 12:30:45 +03:00
Armando Visconti
de5135b05e modules/hal_st: Align sensor drivers to stmemsc HAL i/f v1.03
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v1.03.

Requires https://github.com/zephyrproject-rtos/hal_st/pull/5
(merged as b52fdbf4b62439be9fab9bb4bae9690a42d2fb14)

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-10-13 09:46:08 -05:00
Armando Visconti
4250028483 drivers/sensor: iis2mdc: Fix the temperature in celsius
Fix the formula to translate raw temperature read from
register to Celsius.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-10-13 09:46:08 -05:00
Armando Visconti
99b97f5ff4 drivers/sensor: ism330dhcx: Fix init routines order
The interrupt enabling routine was called before the
chip enabling routine resulting in a runtime failure
when triggers are set.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-10-13 09:46:08 -05:00
Martin Jäger
109a624c85 drivers: can: stm32: add support for pinmux
Add support for DT based pinmux configurations.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-10-13 13:13:08 +02:00
Toby Firth
dc37f988e0 drivers: adc: added support adc driver for lpcexpresso55s69
Added shim driver for the LPADC for lpcexpresso55s69 board.

Fixes #22703.

Signed-off-by: Toby Firth <tobyjfirth@gmail.com>
2020-10-12 14:59:40 -05:00
Mulin Chao
4260cac1e4 drivers: espi: npcx7: fix wrong comparison in vw generic isr.
This CL fixed the wrong comparison during searching the vw signal
that issued interrupt from MIWU in espi_vw_generic_isr().

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-10-12 14:47:33 -05:00
Martin Jäger
1de10bdb9b drivers: dac: stm32: add support for pinmux
Add support for DT based pinmux configurations.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-10-12 08:49:36 -05:00
Erwan Gouriou
b74a2162cb soc/arm: stm32: swap argument order in ST_STM32 PINCTRL macros
In order to be in line with other DT_INST macros in zephyr code base,
swap the arguments order in following macro definitions:
*ST_STM32_DT_PINCTRL
*ST_STM32_DT_INST_PINCTRL
Update the users accordingly.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-09 11:52:59 +02:00
Erwan Gouriou
b38d84fef4 drivers/i2c: stm32: Add pinctrl configuration at driver init
Convert driver to pcintrl configuration using pcintrl helper
macros.
Pinctrl init sequence has to be done before bus_mutex initialization.

Driver dts bindings are updated to reflect usage of pinctrl-x
properties

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-09 11:52:59 +02:00
Erwan Gouriou
2d3cda7663 soc/arm: stm32: use _INST_ namespace in devicetree pinctrl helpers
Current set of helpers provided for STM32 pinctrl devicetree are
using device instance as input.
In order to prepare for next version that will take node identifier
as input, change existing set of macros using _INST_ namespace.

Additionally rename NODE_ID_FROM_PINCTRL to
ST_STM32_DT_INST_NODE_ID_FROM_PINCTRL.

Finally update existing macros users to this new name scheme.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-09 11:52:59 +02:00
Erwan Gouriou
02bd657ce3 drivers/gpio: stm32: Change order of registers configuration
During implementation of i2c pinctrl configuration within i2c driver,
it appears that current order of register configuration used to
generate a spike on I2C bus, leading to broken configuration with
I2C device.
Reverse the order so that pin mode setting is done only after pupd,
speed and type are set, in order to avoid generating unwanted
artefacts on the bus.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-09 11:52:47 +02:00
Armand Ciejak
1faf2a92d7 eth: mcux: Fix typo in define name
VALN -> VLAN

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Armand Ciejak
90262c9a95 eth: mcux: Rename eth_* to eth* to be have consistent naming
Both eth_* and eth* were used before.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Armand Ciejak
df119d2bbf eth: mcux: Enable PTP IRQ only if the ptp node is enabled
This covers the case of 1 controller having PTP enabled and
the other not.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Armand Ciejak
c627ef37ed eth: mcux: Make consistent use of #if defined
As well as #ifndef.
Apply it for all CONFIG_* defines.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Armand Ciejak
cd35b17879 eth: mcux: Rework MAC address assignment functions
Do not override OUI of the local MAC address in the devicetree.
Simplify the mac address assignment conditions. Each interface has
its own function. Code duplication will be eliminated with the
use of DT_INST_FOREACH_STATUS_OKAY in a later commit to completely
remove duplicated code.
The 3 possible MAC address assignment (local, random and unique)
are covered and have been tested.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Armand Ciejak
fde702359e eth: mcux: Do not call eth_name() when dev->name can be used
Spare a function call.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Armand Ciejak
55b88eef22 eth: mcux: Do not compile phy_state_name() if not used
This is better than declaring it unused.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Armand Ciejak
8b38a67ca2 eth: mcux: Replace hard-coded eth_context.clock
This fixes wrong value for i.MX RT.
This is one less hard-coded value in eth_N_context structures.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Armand Ciejak
ac31c4e458 eth: mcux: Get rid of CONFIG_ETH_MCUX_*
Use node's status in device tree instead.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Antoine Zen-Ruffinen
dd72f1f4e6 eth: mcux: Implement set_config
This allows setting the MAC address at run time.

Signed-off-by: Antoine Zen-Ruffinen <antoine@riedonetworks.com>
Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Eric Hay
e51b24b429 drivers: clock_control: stm32g0: Enable the Q divisor on g0X1 variants
The PLL Q divisor does not exist on stm32g0X0 variants. It should only
be configured for g0X1 variants.

Signed-off-by: Eric Hay <EHay@sierrawireless.com>
2020-10-09 11:49:39 +02:00
Eric Hay
5f42ba52d8 soc: arm: stm32g0: add STM32G070 SoC series
This commit adds support for the STM32G070xx SoCs
by STMicroelectronics.

Signed-off-by: Eric Hay <EHay@sierrawireless.com>
2020-10-09 11:49:39 +02:00
Kuba Sanak
52a8020398 drivers: lora: Add CheckRfFrequency callback to SX1276 driver
CheckRfFrequency was not assigned correctly to the Radio. This lead
to the system hang when the loramac library tries to call a relevant
Radio method when processing a join-accept message

Signed-off-by: Kuba Sanak <contact@kuba.fyi>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-10-08 12:15:38 +02:00
Manivannan Sadhasivam
4d1d1bb330 drivers: lora: Add missing function definitions & callbacks for LoRaWAN
For preparing the radio drivers (specifically SX1276) for LoRaWAN
support, let's add missing function definitions and callbacks required
by the stack.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-10-08 12:15:38 +02:00
Manivannan Sadhasivam
47a262f28b drivers: lora: hal_common: Offload calling TimerIrqHandler to work queue
Since TimerIrqHandler() API does SPI transactions, it is not advised to
call from an IRQ context. Hence, offload it to a work queue.

Reported-by: Andreas Sandberg <andreas@sandberg.pp.se>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-10-08 12:15:38 +02:00
Manivannan Sadhasivam
0668e2b795 drivers: lora: Only create loramac-node library if not done before
The loramac-node library definition will also be created by
'subsys/lorawan' for the LoRaWAN support. Hence, just add the source
files if the previous declaration of the library is found else create
a new one.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-10-08 12:15:38 +02:00
Peter Bigot
2ffbad4941 drivers: counter: stm32: hide irrelevant options
CONFIG_COUNTER_RTC_STM32_BACKUP_DOMAIN_RESET=y was showing up in
configs for non-STM32 boards.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-10-07 15:26:03 -05:00
Gerard Marull-Paretas
af1b9442ca drivers: pwm: stm32: add support for pinmux
Add support for DT based pinmux configurations.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-07 12:27:37 -05:00
Gerard Marull-Paretas
aa45e0a90c drivers: pwm: stm32: remove data and config helpers
Now that Zephyr names have been made short and nice the need of these
helpers is less justified.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-07 12:27:37 -05:00
Mulin Chao
50753c1d7d drivers: npcx: Add const modifier for hal instances and so on.
Add const modifier for hal instances, clock devices pointer, and module
base address in npcx drivers to prevent driver functions change them
unexpectedly.

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-10-06 18:16:02 -05:00
Mulin Chao
dd99fbebe6 drivers: pwm: add pwm driver support in NPCX7 series
In npcx7 series, there're 8 Pulse Width Modulator (PWM) modules and each
one support generating a single 16-bit PWM output. A 16-bit clock
prescaler (PRSCn) and a 16-bit counter (CTRn) determine the cycle time,
the minimal possible pulse width, and the duty-cycle steps.

Beside introducing pwm driver for Nuvoton NPCX series, this CL also
includes:

1. Add PWM device tree declarations.
2. Zephyr PWM api implementation.
3. Add aliases in npcx7m6fb_evb board device tree file for supporting
   samples/basic/blinky_pwm application and pwm test suites

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-10-06 18:16:02 -05:00
Krzysztof Chruscinski
ca786ce0ed drivers: timer: nrf_rtc_timer: Use interrupt priority from DT
Changed fix interrupt priority to the one from DT.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-10-06 15:34:34 +02:00
Erwan Gouriou
c495d4b985 drivers/serial: stm32f1: Disable remap when not required
Make sure remap is disabled when not requested.
This should have no impact on current cases but is important
when dynamic pin configuration will be used.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-06 04:58:38 -05:00
Ryan Erickson
2d7ccb59a9 drivers: modem: hl7800: Fix cases where socket would not close
There are cases where the socket would not be closed.
offload_put function will now always close the socket
properly.

Remove error log messages as they are redundant.
on_cmd_sock_error_code handles printing errors.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2020-10-05 15:41:03 -05:00
Andrzej Głąbek
26e6e7ad1f drivers: adc: Improve the default routine providing sampling intervals
This part of common code for ADC drivers, the adc_context_enable_timer()
function, was still converting sampling interval values to milliseconds
(the only option available at the time this code has been created) when
setting up the kernel timer, consequently limiting the maximum sampling
frequency to 1000 samples per second. This patch switches the routine
to specifying the interval in microseconds, to remove this limitation.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-10-05 14:45:37 -05:00
Simon Glass
442f38d610 emul: Add an emulator for the Bosch BMI160 accelerometer
This emulator supports enable functionality to start up the device and
read a few samples. It connects itself to any BMI160 device it finds in
the device tree. The SPI emulation controller driver is used to direct
SPI messages from the BMI160 driver to the BMI160 emulator.

Add a few more definitions to the header file, as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-05 15:33:00 -04:00
Simon Glass
a1d8e55cad emul: spi: Add support for SPI emulators
Add an emulation controller which routes SPI traffic to an attached
emulator. Only one emulator is supported per bus at present, since
chip-selction functionality is not present.

This allows drivers for SPI peripherals to be tested on systems that
don't have that peripheral attached, with the emulator handling the SPI
traffic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-05 15:33:00 -04:00
Simon Glass
5a9f389159 drivers: sensor: bmi160: Use more constants for reg access
At present register access is a mix of constants and open-coded values
in the driver. Add a few more constants to clean this up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-05 15:33:00 -04:00
Simon Glass
2c73f3ed4c drivers: sensor: bmi160: Add a constant for number of axes
Define a constant instead of using an open-coded value.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-05 15:33:00 -04:00
Simon Glass
e944855bbc drivers: sensor: bmi160: Move the ready bit into the header
This should be accessible to all files that need register access. Move
it into the header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-05 15:33:00 -04:00
Marcin Niestroj
ad0dc48067 drivers: modem: ublox-sara-r4: inform modem_context about HW flow control
If HW flow control is enabled, then modem_context framework won't drain
UART FIFO blindly, but will stop when there is no more space in RX
ring_buf. This prevents data loss by "pausing" incoming data on hardware
level.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-10-05 17:04:52 +03:00
Marcin Niestroj
f27de1f1bb drivers: wifi: esp: inform modem_context about HW flow control
If HW flow control is enabled, then modem_context framework won't drain
UART FIFO blindly, but will stop when there is no more space in RX
ring_buf. This prevents data loss by "pausing" incoming data on hardware
level.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-10-05 17:04:52 +03:00
Marcin Niestroj
05eb9644dc modem: iface_uart: improve RX flow with HW flow control
So far all received bytes over UART where blindly drained and pushed to
ring_buf. This approach is okay for UART devices without configured HW
flow control, as it basically decouples data processing from ISR handler
and gives more time before data overrun. However when HW flow control
is enabled, such behavior somehow suppresses UART flow control
advantage, because data can overrun when pushing to ring_buf.

Allow drivers utilizing modem_context framework to pass information
about whether HW flow control is enabled or not. If it is enabled, then
read data from UART FIFO to the point when RX ring_buf is totally filled
and follow such situation by disabling RX interrupt. Incoming data will
be paused on HW level, so there is lots of time for RX thread to process
ring_buf content. Reenable RX interrupts after all data in ring_buf is
processed, so that number of context switches is kept at minimum level.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-10-05 17:04:52 +03:00
Marcin Niestroj
763bd27c75 modem: iface_uart: use ring_buf_{claim,finish} API
This API allows to drop use of preallocated isr_buf. Most importantly as
a result RAM usage is reduced for each driver utilizing modem_context
framework. Additionally there is less copying done in ISR context, as
data is direcly read from UART FIFO to ring_buf.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-10-05 17:04:52 +03:00
Ievgenii Meshcheriakov
5cb09fe0fb drivers: flash: Restore write protection in flash_shell
Restore the flash write proectction after disabling it for
flash write and erase shell commands.

Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
2020-10-02 12:06:28 -04:00