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mcux flexspi: move bus driver to drivers/memc

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Initially the flexspi device only supported a flash driver for
external NOR flash. As the controller supports HyperBus devices,
which can be either volatile or non-volatile, the driver iss moved
to drivers/memc.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This commit is contained in:
Pieter De Gendt 2021-03-31 13:46:34 +02:00 • committed by Maureen Helm
commit acca3c126c
11 changed files with 103 additions and 84 deletions
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6
drivers/flash/CMakeLists.txt
View file

@ -18,7 +18,6 @@ zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_NIOS2_QSPI soc_flash_nios2_qspi.c)
zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_GECKO flash_gecko.c)
zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_RV32M1 soc_flash_rv32m1.c)
zephyr_library_sources_ifdef(CONFIG_FLASH_STM32_QSPI flash_stm32_qspi.c)
zephyr_library_sources_ifdef(CONFIG_FLASH_MCUX_FLEXSPI flash_mcux_flexspi.c)
zephyr_library_sources_ifdef(CONFIG_FLASH_MCUX_FLEXSPI_NOR flash_mcux_flexspi_nor.c)
zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_ESP32 flash_esp32.c)
@ -38,6 +37,11 @@ if(CONFIG_SOC_FLASH_STM32)
endif()
endif()
zephyr_include_directories_ifdef(
CONFIG_FLASH_MCUX_FLEXSPI_NOR
${ZEPHYR_BASE}/drivers/memc
)
zephyr_include_directories_ifdef(
CONFIG_SOC_FLASH_NRF_RADIO_SYNC_TICKER
${ZEPHYR_BASE}/subsys/bluetooth

6
drivers/flash/Kconfig.mcux
View file

@ -31,9 +31,7 @@ config FLASH_MCUX_FLEXSPI_NOR
bool "MCUX FlexSPI NOR driver"
select FLASH_HAS_PAGE_LAYOUT
select FLASH_HAS_DRIVER_ENABLED
select FLASH_MCUX_FLEXSPI
config FLASH_MCUX_FLEXSPI
bool
select MEMC
select MEMC_MCUX_FLEXSPI
endif # HAS_MCUX_FLEXSPI

23
drivers/flash/flash_mcux_flexspi.h
View file

@ -1,23 +0,0 @@
/*
* Copyright 2020 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <drivers/flash.h>
#include <fsl_flexspi.h>
int flash_flexspi_update_lut(const struct device *dev, uint32_t index,
const uint32_t *cmd, uint32_t count);
int flash_flexspi_set_flash_config(const struct device *dev,
const flexspi_device_config_t *device_config,
flexspi_port_t port);
int flash_flexspi_reset(const struct device *dev);
int flash_flexspi_transfer(const struct device *dev,
flexspi_transfer_t *transfer);
void *flash_flexspi_get_ahb_address(const struct device *dev,
flexspi_port_t port, off_t offset);

54
drivers/flash/flash_mcux_flexspi_nor.c
View file

@ -10,7 +10,7 @@
#include <logging/log.h>
#include <sys/util.h>
#include "spi_nor.h"
#include "flash_mcux_flexspi.h"
#include "memc_mcux_flexspi.h"
#ifdef CONFIG_HAS_MCUX_CACHE
#include <fsl_cache.h>
@ -119,7 +119,7 @@ static int flash_flexspi_nor_get_vendor_id(const struct device *dev,
LOG_DBG("Reading id");
ret = flash_flexspi_transfer(data->controller, &transfer);
ret = memc_flexspi_transfer(data->controller, &transfer);
*vendor_id = buffer;
return ret;
@ -143,7 +143,7 @@ static int flash_flexspi_nor_read_status(const struct device *dev,
LOG_DBG("Reading status register");
return flash_flexspi_transfer(data->controller, &transfer);
return memc_flexspi_transfer(data->controller, &transfer);
}
static int flash_flexspi_nor_write_status(const struct device *dev,
@ -164,7 +164,7 @@ static int flash_flexspi_nor_write_status(const struct device *dev,
LOG_DBG("Writing status register");
return flash_flexspi_transfer(data->controller, &transfer);
return memc_flexspi_transfer(data->controller, &transfer);
}
static int flash_flexspi_nor_write_enable(const struct device *dev)
@ -184,7 +184,7 @@ static int flash_flexspi_nor_write_enable(const struct device *dev)
LOG_DBG("Enabling write");
return flash_flexspi_transfer(data->controller, &transfer);
return memc_flexspi_transfer(data->controller, &transfer);
}
static int flash_flexspi_nor_erase_sector(const struct device *dev,
@ -205,7 +205,7 @@ static int flash_flexspi_nor_erase_sector(const struct device *dev,
LOG_DBG("Erasing sector at 0x%08x", offset);
return flash_flexspi_transfer(data->controller, &transfer);
return memc_flexspi_transfer(data->controller, &transfer);
}
static int flash_flexspi_nor_erase_chip(const struct device *dev)
@ -225,7 +225,7 @@ static int flash_flexspi_nor_erase_chip(const struct device *dev)
LOG_DBG("Erasing chip");
return flash_flexspi_transfer(data->controller, &transfer);
return memc_flexspi_transfer(data->controller, &transfer);
}
static int flash_flexspi_nor_page_program(const struct device *dev,
@ -246,7 +246,7 @@ static int flash_flexspi_nor_page_program(const struct device *dev,
LOG_DBG("Page programming %d bytes to 0x%08x", len, offset);
return flash_flexspi_transfer(data->controller, &transfer);
return memc_flexspi_transfer(data->controller, &transfer);
}
static int flash_flexspi_nor_wait_bus_busy(const struct device *dev)
@ -273,7 +273,7 @@ static int flash_flexspi_nor_enable_quad_mode(const struct device *dev)
flash_flexspi_nor_write_status(dev, &status);
flash_flexspi_nor_wait_bus_busy(dev);
flash_flexspi_reset(data->controller);
memc_flexspi_reset(data->controller);
return 0;
}
@ -283,9 +283,9 @@ static int flash_flexspi_nor_read(const struct device *dev, off_t offset,
{
const struct flash_flexspi_nor_config *config = dev->config;
struct flash_flexspi_nor_data *data = dev->data;
uint8_t *src = flash_flexspi_get_ahb_address(data->controller,
config->port,
offset);
uint8_t *src = memc_flexspi_get_ahb_address(data->controller,
config->port,
offset);
memcpy(buffer, src, len);
@ -301,16 +301,16 @@ static int flash_flexspi_nor_write(const struct device *dev, off_t offset,
uint8_t *src = (uint8_t *) buffer;
int i;
uint8_t *dst = flash_flexspi_get_ahb_address(data->controller,
config->port,
offset);
uint8_t *dst = memc_flexspi_get_ahb_address(data->controller,
config->port,
offset);
while (len) {
i = MIN(SPI_NOR_PAGE_SIZE, len);
flash_flexspi_nor_write_enable(dev);
flash_flexspi_nor_page_program(dev, offset, src, i);
flash_flexspi_nor_wait_bus_busy(dev);
flash_flexspi_reset(data->controller);
memc_flexspi_reset(data->controller);
offset += i;
len -= i;
}
@ -330,9 +330,9 @@ static int flash_flexspi_nor_erase(const struct device *dev, off_t offset,
int num_sectors = size / SPI_NOR_SECTOR_SIZE;
int i;
uint8_t *dst = flash_flexspi_get_ahb_address(data->controller,
config->port,
offset);
uint8_t *dst = memc_flexspi_get_ahb_address(data->controller,
config->port,
offset);
if (offset % SPI_NOR_SECTOR_SIZE) {
LOG_ERR("Invalid offset");
@ -348,13 +348,13 @@ static int flash_flexspi_nor_erase(const struct device *dev, off_t offset,
flash_flexspi_nor_write_enable(dev);
flash_flexspi_nor_erase_chip(dev);
flash_flexspi_nor_wait_bus_busy(dev);
flash_flexspi_reset(data->controller);
memc_flexspi_reset(data->controller);
} else {
for (i = 0; i < num_sectors; i++) {
flash_flexspi_nor_write_enable(dev);
flash_flexspi_nor_erase_sector(dev, offset);
flash_flexspi_nor_wait_bus_busy(dev);
flash_flexspi_reset(data->controller);
memc_flexspi_reset(data->controller);
offset += SPI_NOR_SECTOR_SIZE;
}
}
@ -397,20 +397,20 @@ static int flash_flexspi_nor_init(const struct device *dev)
return -EINVAL;
}
if (flash_flexspi_set_flash_config(data->controller, &config->config,
if (memc_flexspi_set_device_config(data->controller, &config->config,
config->port)) {
LOG_ERR("Could not set flash configuration");
LOG_ERR("Could not set device configuration");
return -EINVAL;
}
if (flash_flexspi_update_lut(data->controller, 0,
(const uint32_t *) flash_flexspi_nor_lut,
sizeof(flash_flexspi_nor_lut) / 4)) {
if (memc_flexspi_update_lut(data->controller, 0,
(const uint32_t *) flash_flexspi_nor_lut,
sizeof(flash_flexspi_nor_lut) / 4)) {
LOG_ERR("Could not update lut");
return -EINVAL;
}
flash_flexspi_reset(data->controller);
memc_flexspi_reset(data->controller);
if (flash_flexspi_nor_get_vendor_id(dev, &vendor_id)) {
LOG_ERR("Could not read vendor id");

4
drivers/memc/CMakeLists.txt
View file

@ -1,3 +1,7 @@
# SPDX-License-Identifier: Apache-2.0
zephyr_sources_ifdef(CONFIG_MEMC_STM32 memc_stm32.c)
zephyr_sources_ifdef(CONFIG_MEMC_STM32_SDRAM memc_stm32_sdram.c)
zephyr_linker_sources_ifdef(CONFIG_MEMC_STM32_SDRAM SECTIONS memc_stm32_sdram.ld)
zephyr_sources_ifdef(CONFIG_MEMC_MCUX_FLEXSPI memc_mcux_flexspi.c)

2
drivers/memc/Kconfig
View file

@ -22,4 +22,6 @@ config MEMC_INIT_PRIORITY
source "drivers/memc/Kconfig.stm32"
source "drivers/memc/Kconfig.mcux"
endif

10
drivers/memc/Kconfig.mcux Normal file
View file

@ -0,0 +1,10 @@
# Copyright (c) 2020 NXP
# Copyright (c) 2021 Basalte bv
# SPDX-License-Identifier: Apache-2.0
if HAS_MCUX_FLEXSPI
config MEMC_MCUX_FLEXSPI
bool
endif

54
drivers/flash/flash_mcux_flexspi.c → drivers/memc/memc_mcux_flexspi.c
View file

@ -6,14 +6,14 @@
#define DT_DRV_COMPAT nxp_imx_flexspi
#include <drivers/flash.h>
#include <logging/log.h>
#include <sys/util.h>
#include "flash_mcux_flexspi.h"
LOG_MODULE_REGISTER(flash_flexspi, CONFIG_FLASH_LOG_LEVEL);
#include "memc_mcux_flexspi.h"
struct flash_flexspi_config {
LOG_MODULE_REGISTER(memc_flexspi, CONFIG_MEMC_LOG_LEVEL);
struct memc_flexspi_config {
FLEXSPI_Type *base;
uint8_t *ahb_base;
bool ahb_bufferable;
@ -24,26 +24,26 @@ struct flash_flexspi_config {
flexspi_read_sample_clock_t rx_sample_clock;
};
struct flash_flexspi_data {
struct memc_flexspi_data {
size_t size[kFLEXSPI_PortCount];
};
int flash_flexspi_update_lut(const struct device *dev, uint32_t index,
int memc_flexspi_update_lut(const struct device *dev, uint32_t index,
const uint32_t *cmd, uint32_t count)
{
const struct flash_flexspi_config *config = dev->config;
const struct memc_flexspi_config *config = dev->config;
FLEXSPI_UpdateLUT(config->base, index, cmd, count);
return 0;
}
int flash_flexspi_set_flash_config(const struct device *dev,
int memc_flexspi_set_device_config(const struct device *dev,
const flexspi_device_config_t *device_config,
flexspi_port_t port)
{
const struct flash_flexspi_config *config = dev->config;
struct flash_flexspi_data *data = dev->data;
const struct memc_flexspi_config *config = dev->config;
struct memc_flexspi_data *data = dev->data;
if (port >= kFLEXSPI_PortCount) {
LOG_ERR("Invalid port number");
@ -59,19 +59,19 @@ int flash_flexspi_set_flash_config(const struct device *dev,
return 0;
}
int flash_flexspi_reset(const struct device *dev)
int memc_flexspi_reset(const struct device *dev)
{
const struct flash_flexspi_config *config = dev->config;
const struct memc_flexspi_config *config = dev->config;
FLEXSPI_SoftwareReset(config->base);
return 0;
}
int flash_flexspi_transfer(const struct device *dev,
int memc_flexspi_transfer(const struct device *dev,
flexspi_transfer_t *transfer)
{
const struct flash_flexspi_config *config = dev->config;
const struct memc_flexspi_config *config = dev->config;
status_t status = FLEXSPI_TransferBlocking(config->base, transfer);
if (status != kStatus_Success) {
@ -82,11 +82,11 @@ int flash_flexspi_transfer(const struct device *dev,
return 0;
}
void *flash_flexspi_get_ahb_address(const struct device *dev,
void *memc_flexspi_get_ahb_address(const struct device *dev,
flexspi_port_t port, off_t offset)
{
const struct flash_flexspi_config *config = dev->config;
struct flash_flexspi_data *data = dev->data;
const struct memc_flexspi_config *config = dev->config;
struct memc_flexspi_data *data = dev->data;
int i;
if (port >= kFLEXSPI_PortCount) {
@ -101,9 +101,9 @@ void *flash_flexspi_get_ahb_address(const struct device *dev,
return config->ahb_base + offset;
}
static int flash_flexspi_init(const struct device *dev)
static int memc_flexspi_init(const struct device *dev)
{
const struct flash_flexspi_config *config = dev->config;
const struct memc_flexspi_config *config = dev->config;
flexspi_config_t flexspi_config;
FLEXSPI_GetDefaultConfig(&flexspi_config);
@ -120,9 +120,9 @@ static int flash_flexspi_init(const struct device *dev)
return 0;
}
#define FLASH_FLEXSPI(n) \
static const struct flash_flexspi_config \
flash_flexspi_config_##n = { \
#define MEMC_FLEXSPI(n) \
static const struct memc_flexspi_config \
memc_flexspi_config_##n = { \
.base = (FLEXSPI_Type *) DT_INST_REG_ADDR(n), \
.ahb_base = (uint8_t *) DT_INST_REG_ADDR_BY_IDX(n, 1), \
.ahb_bufferable = DT_INST_PROP(n, ahb_bufferable), \
@ -133,15 +133,15 @@ static int flash_flexspi_init(const struct device *dev)
.rx_sample_clock = DT_INST_PROP(n, rx_clock_source), \
}; \
\
static struct flash_flexspi_data flash_flexspi_data_##n; \
static struct memc_flexspi_data memc_flexspi_data_##n; \
\
DEVICE_DT_INST_DEFINE(n, \
flash_flexspi_init, \
memc_flexspi_init, \
device_pm_control_nop, \
&flash_flexspi_data_##n, \
&flash_flexspi_config_##n, \
&memc_flexspi_data_##n, \
&memc_flexspi_config_##n, \
POST_KERNEL, \
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
NULL);
DT_INST_FOREACH_STATUS_OKAY(FLASH_FLEXSPI)
DT_INST_FOREACH_STATUS_OKAY(MEMC_FLEXSPI)

24
drivers/memc/memc_mcux_flexspi.h Normal file
View file

@ -0,0 +1,24 @@
/*
* Copyright 2020 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <device.h>
#include <sys/types.h>
#include <fsl_flexspi.h>
int memc_flexspi_update_lut(const struct device *dev, uint32_t index,
const uint32_t *cmd, uint32_t count);
int memc_flexspi_set_device_config(const struct device *dev,
const flexspi_device_config_t *device_config,
flexspi_port_t port);
int memc_flexspi_reset(const struct device *dev);
int memc_flexspi_transfer(const struct device *dev,
flexspi_transfer_t *transfer);
void *memc_flexspi_get_ahb_address(const struct device *dev,
flexspi_port_t port, off_t offset);

2
soc/arm/nxp_imx/rt/soc.c
View file

@ -216,7 +216,7 @@ static ALWAYS_INLINE void clock_init(void)
CLOCK_SetMux(kCLOCK_CanMux, 2); /* Set Can clock source. */
#endif
#if defined(CONFIG_FLASH_MCUX_FLEXSPI) && DT_NODE_HAS_STATUS(DT_NODELABEL(flexspi), okay)
#if defined(CONFIG_MEMC_MCUX_FLEXSPI) && DT_NODE_HAS_STATUS(DT_NODELABEL(flexspi), okay)
CLOCK_DisableClock(kCLOCK_FlexSpi);
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 24);
CLOCK_SetMux(kCLOCK_FlexspiMux, 3);

2
west.yml
View file

@ -100,7 +100,7 @@ manifest:
revision: 244d685184e7e983f47569be276d9d4c1b133016
path: tools/net-tools
- name: hal_nxp
revision: b916bca1d5976b0157be80b326e3bb46ef605286
revision: 6f587556a98b5167b1f301c1e10fed1443942906
path: modules/hal/nxp
- name: open-amp
revision: de1b85a13032a2de1d8b6695ae5f800b613e739d