When setting endpoint capabilities, the driver uses the MPS stored in each
instance's configuration for OUT endpoints, but used a hardcoded 1023 for
IN endpoints.
Use the instance MPS when preparing IN endpoints' capabilities too.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Instead of snooping SETUP packets for SET_ADDRESS request to call the HAL
SetAddress() function manually, mark device with the addr_before_status
capability such that the UDC stack will call udc_stm32_set_address()
before submitting status by itself.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Split variables definition into 2 line as per Zephyr coding style
expectations since they are of different type.
No functional changes.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Remove useless test on buffer length in handle_msg_setup() since the
buffer was allocated few lines above with a known non zero size.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Remove useless OR operation on return value is udc_stm32_enable()
since the return value is always 0 before it's OR-ed with a new return
value.
No functional changes.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Change implementation to ensure all boolean test are done on essentially
boolean values.
No functional changes.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Rename endpoint configuration pointer variable in HAL_PCD_ResetCallback(),
udc_stm32_ep_mem_config() and udc_stm32_ep_disable() from ep to ep_cfg
to prevent confusion since ep is usually used as endpoint address.
For consistency, also use ep_cfg elsewhere where an endpoint config
pointer is used, instead of using either cfg, ecfg and ep_cfg.
No functional changes.
Suggested-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add support for USB on STM32WBA6x series, along with a tiny rework of how
the st,stm32u5-otghs-phy is handled to make the code more generic by
actually consuming DT information.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
On most parts of the STM32F4 series, when the OTG_HS controller is used in
FS mode, the ULIP **low-power** clock must also be disabled for proper
operation. This was done properly in an old version of the driver but was
lost as part of refactoring[1].
Re-introduce ULPI low-power clock disable when OTG_HS is used in FS mode.
[1] See commit e31ddec781
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Actually do what the comment says and wait for Vdd33USB to be ready,
instead of waiting for the opposite.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
During a Host-to-Device Control transfer, an arbitrary amount of data is
sent from Host to the Device using OUT Data packets. If the total amount of
data to transfer, communicated via the wLength field of the SETUP packet,
exceeds the EP0 MaxPacketSize, several Data packets until all data has been
transfered.
Combined with HAL behavior, the STM32 driver did not handle this situation
properly and always ended reception after a single Data packet was received
regardless of whether or not all data had actually been received from Host.
Modify driver to handle this situation properly by keeping track of how
much data has been received and restarting transfers until we have received
everything the Host promised it would send.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Drop all existing transfers in control endpoints' queue when a new SETUP
packet is received. Also use the appropriate net_buf API in a nearby place.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Create a new Kconfig option allowing to tweak the RxFIFO size on OTG_FS
and OTG_HS instances, and replace the old hardcoded method with this new
mecanism.
The default value of 600 bytes yields a similar size to the the previous
hardcoded default of 160 words (= 640 bytes) when combined with the fixed
overhead computed by the driver (~56 bytes on OTG_FS with 6 endpoints).
Also fix a tiny error in a logging message (DRAM size in bytes, not bits).
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The maximal packet size (for non-control endpoints) was obtained by the
driver from HAL definitions which appear to not properly reflect hardware
capabilities.
Update driver to allow endpoints with wMaxPacketSize up to the maximal
value allowed by the USB Specification depending on operation mode, since
all STM32 USB controllers always support these values. Also move the EP
max packet size field in the 'struct udc_stm32_config' to avoid implicit
padding and add a documentation comment.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
STM32 OTG USB controllers use word-addressable RAM with a 32-bit word size
so all allocations from the USB SRAM must be 32-bit aligned. The driver did
not accept unaligned values of wMaxPacketSize, and FIFO allocation code was
implicitly expecting FIFO sizes to be aligned as well (since it allocated
"bytes / 4" without rounding up).
Update driver to accept values of wMaxPacketSize that aren't word-aligned
and to allocate properly sized FIFOs sizes when an unaligned size has been
requested.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The ST USB controller (compatible 'st,stm32-usb') is fitted with private
SRAM called the Private Memory Area or PMA. This is primarily used to hold
data transfered over USB, but it also contains the so-called 'buffer table'
(a.k.a. BTABLE) which holds the base address and size of buffers in the PMA
allocated to each endpoint. The BTABLE is placed by the driver at the start
of the PMA and occupies a fixed size ('USB_BTABLE_SIZE'), which was stored
in the driver configuration field 'pma_offset'. This mechanism is unused on
non-ST USB controllers from STM32 microcontrollers, but USB_BTABLE_SIZE is
still defined (to a dummy value) and stored in the 'pma_offset' field which
becomes unused.
Remove the 'USB_BTABLE_SIZE' definition and the 'pma_offset' field from the
driver configuration, and update the ST USB controller-specific verison of
'udc_stm32_mem_init' to derive the BTABLE size from the number of endpoints
that the controller has instead.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The EP0 max packet size was de facto a constant because its value was the
same regardless of which USB IP was in use. However, it was stored as part
of the instance configuration anyways which is wasteful and slower.
Create new "UDC_STM32_EP0_MAX_PACKET_SIZE" driver-level constant with which
all usage of the per-instance configuration field is replaced.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Avoid incorrect (clock_control_subsys_t *) incorrect cast and
remove the cast of pclken in calls to the clock_control_
framework.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Rework how the STM32 UDC driver determines the PHY used by a given instance
and the speed at which the instance is able to and allowed to operate.
The PHY determination now uses the 'phys' property instead of looking at
whether nodes with a specific compatible were enabled. Similarly, the speed
determination takes into account the 'maximum-speed' property, along with
the selected PHY's and the instance's capabilities.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Rework how the driver performs PWR configuration and initializes HS PHYs.
Originally, the initialization logic was split in half without any real
logic. There were also attempts to share some logic but this resulted in
code that was difficult to understand.
Initialize PWR and PHY in well separated steps, and use explicit series
and PHY type checks in each part to ensure the logic is easy to understand.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Rework the STM32 USB UDC driver to use HAL PCD macros for speed selection,
as should have always been done since that is the library used by the shim
driver. Also dummy definitions to ensure cross-series compatibility
without many #if blocks in the driver.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Handle endpoints in halted state properly by marking endpoints as halted
when appropriate, and inhibiting transfers involving halted endpoints.
Co-authored-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Signed-off-by: Mathieu CHOPLAIN <mathieu.choplain-ext@st.com>
The OTG_HS PHY from stm32u5a5xx device require the correct reference
clock frequency selction in SYSCFG_OTGHSPHYCR. The current default is
hard coded to 16Mhz (which matches the development board crystal).
However, a custom board my require a different crystal and then the
USB will not work. This add a required field in the
st,stm32u5-otghs-phy binding to force user to select the correct
clock reference. The current nucleo_u5a5zj_q baord was updated to
reflect the mandatory field.
Signed-off-by: BUDKE Gerson Fernando <gerson.budke@leica-geosystems.com>
Clear the suspended status and submit the resume event once the remote
wakeup signaling is finished. Clear the suspended status on bus reset as
well.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Prevent disabling OTG HS and USBPHY clocks
during sleep on STM32U5 series
Disabling these clocks during sleep mode
was causing USB device initialization issues
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
USB_OTG_HS_EMB_PHY macro is always defined, so
`defined(USB_OTG_HS_EMB_PHY)` always results in true. This means that
driver always selected `USB_OTG_SPEED_HIGH_IN_FULL` and never
`USB_OTG_SPEED_HIGH`.
Fix that by checking value of defined macro.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
- Reset specific configuration bits in
USB1_HS_PHYC->USBPHYC_CR before setting new values.
- Set the Frequency Selection (FSEL) bits to operate
the USB PHY Control Register at 24 MHz for proper communication.
- Enable the OTGPHY1 peripheral clock using LL_AHB5_GRP1_EnableClock.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
- Unified the handling of USB OTG HS and USB OTG FS
by removing redundant preprocessor conditionals.
- Introduced a new macro `UDC_STM32_BASE_ADDRESS`
to dynamically set the USB base address.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Updated UDC speed definition macros for STM32 series
to handle different speed configurations
based on the SoC compatibility.
Added conditional checks for full-speed definitions
using DT_HAS_COMPAT_STATUS_OKAY for st_stm32_usb.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Add defines to avoid magic values in the dtsi.
Replace usb_dc_stm32_get_maximum_speed() with device tree property.
- Use DT_INST_STRING_UPPER_TOKEN(0, maximum_speed) to set the USB speed.
- Remove PCD_SPEED_FULL initialization.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
UDC API passes struct udc_ep_config to all functions. Some UDC functions
were using endpoint config structure while some were using device and
endpoint number. This API inconsistency led to completely unnecessary
endpoint structure lookups. Remove unnecessary lookups by using endpoint
config structure pointer where it makes sense.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
I mistakenly assumed in the commit 6aaad0a5cd
("drivers: udc_stm32: handle ZLP flag") that the HAL driver would handle
ZLP flag in control transfers itself, but that does not seem to be the
case.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
USB stack does not check api->lock() and api->unlock() return value and
all UDC drivers block without timeout in its lock() and unlock() api
implementations. There is no realistic way to handle lock() and unlock()
errors without making USB device stack API unnecessarily complex.
Remove the return type from lock() and unlock() to make it clear that
the functions must not fail.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Introduce `UDC_STM32_CLOCK_CHECK` Kconfig option since
`USB_DC_STM32_CLOCK_CHECK` was intended for use with `usb_dc_stm32.c`,
which is mutually exclusive with `udc_stm32.c`.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
On USB HS, the previous lower limit of 64 is too small, the value
160 has been chosen apparently through trial and error.
See 1204aa25 for the original implementation in the old device driver.
Signed-off-by: Tobias Pisani <mail@topisani.dev>
This fixes usbd_caps_speed(), which is used in sample_usbd_init, and the
documentation. Without it, no high speed configuration would be added.
Signed-off-by: Tobias Pisani <mail@topisani.dev>
All HAL callback handling is offloaded to a separate thread, as they
involve non isr-compatible operations such as mutexes.
Fixes#61464
Signed-off-by: Tobias Pisani <mail@topisani.dev>
In the device that has `DT_DRV_COMPAT` equal to `st_stm32_usb`,
its behavior differs from `st_stm32_otghs` and `st_stm32_otgfs`
due to the underlying `HAL_PCD_IRQHandler`.
As a result, calling `usbd_ctrl_feed_dout` for the DOUT stage is not
compatible with the `st_stm32_usb` device.
Instead of calling `usbd_ctrl_feed_dout`, we still require flushing
the TX FIFO to the host.
This is achieved by calling `HAL_PCD_EP_Receive` with `len` = `0`.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Any request 5 did set the address even if it's a non standard
request like vendor specific requests.
Signed-off-by: David Schneider <schneidav81@gmail.com>
Instead, use the helper to get the size field from the MPS value.
MPS value may contain information about additional transaction
per microframe (bits 12..11).
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Convert users of net_buf_put() and net_buf_get() functions to use
non-wrapped putters and getters k_fifo_put() and k_fifo_get().
Special handling of net_bufs in k_fifos is no longer needed after commit
3d306c181f, since these actions are now
atomic regardless of any net_buf fragments.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Force disabling the USB OTG HS and PHY clock during sleepmode
By default, that clock is enabled by clock gating during sleep
mode. Like stm32H7, it has to be kept running.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Special sequence to enable clock and power for the OTG HS
peripheral of the stm32U59x serie
This code is based on the stm32Cube HAL_HCD_MspInit/DeInit.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Set the correct the phy_itface depending on the setting
Save few lines after resetting the priv->pcd structure
with the memset
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Driver includes wrong header zephyr/usb/usb_device.h and uses defines
from include/zephyr/drivers/usb/usb_dc.h.
Also fix udc_ep_enable() implementation in general. HAL_PCD_EP_Open()
takes the ep_type parameter as uint8_t integer type and the shim driver
should not just pass int type.
It is recommended that drivers use ep_cfg or cfg for struct
udc_ep_config, fix this as well.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
