The baudrate calculation present in set_baudrate() is
causing the UART to emit inital bytes incorrectly, for a
reason currently unknown, but directly related to the fact
that __aeabi_uldivmod is being invoked.
Since the nRF5x Product Specifications do not provide a
standard formula to calculate baudrates and instead list
a predefined set of divisor values, we opt here to use the
official values and remove the attempt at calculating them
manually.
Change-Id: Ic3ff42ea6d065e9a1d26a5350ce5bf5ad661160a
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The exact pin numbers for the nRF5 UART configuration is
board-specific, so the Kconfig default values should be in a
board-specific file.
Change-Id: Ibaacde292db191221e32b3626c68bf972dd26016
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Default IRQ priority changed to 1 to so it can also be compatible with
nRF51 (Cortex-M0 allows up to 4 priority levels but Zephyr needs the
first two for the OS).
Change-Id: Ie57a729f5d932f020a7d1d7e55cf3741f1ecfbab
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Integrating the IRQ definitions for both nRF51 and nRF52, and defining
the set of IRQ values that are common to both.
Also switch the controller, uart and clock drivers to use the common
header definitions.
Change-Id: Id6816d7a97720896cfe4df83656fb8b1f8fb01fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
The field is "NF: Noise detect flag". Given that every other field name is
faithful to the manual, do the same for NF.
Change-Id: I300663e6d5016bf28071d2a1926ec73682ae3d01
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_USB_BASE is renamed to QM_USB_0_BASE;
- parameter int_en from qm_uart cfg struct was removed;
- driver's folder now has a new structure, fix makefiles accordingly;
- QM_WDT_MODE and related renamed to QM_WDT_CR_RMOD;
- QM_SCSS_AON renamed to QM_AONC.
Change-Id: Iffe9c66b7a3f2fe64418326e20ff0894149b3044
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
The Atmel SAM3 serial driver poll in function checked
for new characters incorrectly.
Change-Id: I9024a991404bf949226634c9f6c6ea507577cff1
Signed-off-by: Justin Watson <jwatson5@gmail.com>
PCI enumeration modifies pci_dev and port at driver initialization,
these objects move from config_info to driver_data in preparation for
config_info becoming const.
This driver shares a unified uart configuration structure with other
uart device drivers. The structure uses 'union' and the preprocessor
to customize the structure to the drivers specific requirement. There
appears to be no compelling reason why all the uart drivers should
share the same (customized) config_info structure. In order to
re-organize the structure for this driver to get config_info const, an
ns16550 specific config structure is defined and the driver switched
over from the generic uart_config.
Change-Id: I31932d811f623a9370b69903114ae97b15d65886
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Make pointers to struct config_info const in prepration for a const
config_info.
Change-Id: I0257e242a2d3bc4e353a3477364a4d9a7fb72b82
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The drivers config structure initializer sets sys_clk_freq statically.
The runtime repeated setup of sys_clk_freq is superfluous, and
inconsitent with const driver config structures.
Change-Id: I115e2b70b193b567de83132f3984e48b2dded0a2
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Make pointers to struct config_info const in prepration for a const
config_info.
Change-Id: I8ecc10b50e23d2dbe987e3318bac09e235b1e1da
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@gmail.com>
Updated CONFIG_SOC_QUARK_SE_SS to CONFIG_SOC_QUARK_SE_C1000_SS
Change-Id: I7dc02d91a4d739f6cd3f84001d1dd29759317163
Signed-off-by: Javier B Perez <javier.b.perez.hernandez@intel.com>
Update the power sample and drivers with the new device driver power
management API using the existing logic
Jira: ZEP-954
Change-Id: Idd94232e458767635973e94e9fc673c01612c1e2
Signed-off-by: Amir Kaplan <amir.kaplan@intel.com>
The Sensor Subsystem has different IRQ numbers for the same device
across CPUs. QMSI declares these, but doesn't do anything to try to
map it automatically, so we have to do it in the driver.
Similarly the SCSS interrupt routing (the SoC-wide "APIC", which is
distinct from the per-CPU interrupt masking hardware) needs to know
which CPU we're trying to unmask an interrupt for.
Change-Id: I27e5ec44f324f869e16a92e7ef40a22a305d98a2
Jira: ZEP-546
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Completing the terminology change started with change 4008
by updating the Kconfig files processed to produce the
online documentation, plus header files processed by
doxygen. References to 'platform' are change to 'board'
Change-Id: Id0ed3dc1439a0ea0a4bd19d4904889cf79bec33e
Jira: ZEP-534
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
One remaining reference to uart_qmsi_pm_save_config
was missed by patch bc60506d3e.
This reference is removed.
This fixes the following error:
...
drivers/built-in.o: In function `uart_qmsi_line_ctrl_set':
/drivers/serial/uart_qmsi.c:439:
undefined reference to `uart_qmsi_pm_save_config'
collect2: error: ld returned 1 exit status
...
Change-Id: I1ceda0e152db5a1c7f70d67c04b931416687031a
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
In order to restore uart context after entering
SYS_PM_DEEP_SLEEP, suspend and resume functions
are called.
The following parameters are restored:
- All registers for the UART device.
- UART clocks.
The FIFO control register cannot be read back and is
not stored in the device configuration.
The default parameters are applied for them.
The suspend/resume functionality is implemented in
the QMSI shim layer as a fast and temporary solution,
it will be removed and migrated to QMSI later.
Change-Id: I4be9246f6aa5a6e0d91df54c1c69574060136607
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
CONFIG_UART_INTERRUPT_DRIVE should be CONFIG_UART_INTERRUPT_DRIVEN
CONFIG_UART_LINE_CTR should be CONFIG_UART_LINE_CTRL
Change-Id: I11fba5b387e3d36711cd3c813fc8a297ae23af05
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The macro defining the device_pm_ops structs is located inside an
ifdef for CONFIG_UART_QMSI_0, so when the UART_0 is disabled at build
time, but UART_1 is still used, it references a struct not defined.
Fix it by placing the DEFINE_DEVICE_PM_OPS line outside the ifdef block.
Change-Id: I7dafda162741201ee47b5b480c07ec8c1f373d64
Signed-off-by: Iván Briano <ivan.briano@intel.com>
This adds some basic suspend/resume support in the uart_qmsi
driver. This is part of a change to enable device suspend/resume
and deep sleep support in sample PM application.
Jira: ZEP-512
Change-Id: I38cfbfb352d0027b7beaadebedbc10002dade50a
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Use IOAPIC_EDGE instead of IOAPIC_LEVEL to fix missing interrupts.
During tests it was found that using IOAPIC_LEVEL interrupts for UART at
some points are lost.
Proposed by Calando, Antoine <antoine.calando@intel.com>
Change-Id: I18b20217c4d73fdeaa424bf59d00f6be1ec6ef1b
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Revert patch fixing Bluetooth application with Debug enabled crashing.
This reverts commit 029d3beb57.
Change-Id: I0004dae656ca5a0b44da9f12542088d47c38b837
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
QMSI uart driver has removed qm_uart_get_config API. Updated
the shim driver to use alternatives.
Change-Id: I3ccfd0dfec3711d250de7d1004275d9b02d7477a
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
Global data and device setting can be messed up by concurrent
API calls. This change is to serialize the access.
Jira: ZEP-454
Change-Id: I520722aecab7db443d053fd45498a22e165889de
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
This currently only supports outgoing messages without interrupts.
Change-Id: I635562f47106eb6cdc7104a8160e431bebea25dc
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
In order to change the baudrate the DLAB bit of the LCR register has to
be set to 1 (This bit is used to enable reading and writing of the
divisor latch register). This bit must be cleared after the baudrate
setup in order to access other registers.
The set_baud_rate function correctly sets the DLAB bit of the LCR reg but
never clears it. Therefore the ns16550 doesn't properly work any more
after updating the initial baud rate.
In order to fix this issue the LCR reg has to be temporary saved
(because it contains other important settings). After switching to a new
baud rate the LCR reg value has to be restored.
Change-Id: Ied4db683cbf40ba3125e747552968ddf1a66e2be
Signed-off-by: Jeremie GARCIA <jeremie.garcia@intel.com>
Signed-off-by: Sebastien GRIFFOUL <sebastien.griffoul@intel.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On current Curie-based boards UART 0 is wired to the nRF51 BLE
controller and requires HW flow control to be enabled in order to
function. This patch restores the same behavior that was present
before the "qmsi: uart: use built-in qmsi driver" patch.
Change-Id: If7ea347f5ab8b460f39123dcc0d75d711a5a1c2a
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
