In PWM_SetupPwm implementation, there is a check:
temp = pwmClock / pwmFreq_Hz;
assert(temp <= 0xFFFFU);
Currently pwmFreq_Hz is 1, makes assert failed with
high frequency pwmClock. Since VALx values is set
directly for edge aligned PWM, the pwmFreq_Hz here is
a dummy value, set pwmFreq_Hz equal to pwmClock
frequency to pass assert check.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Add PWM shell command for getting the number of cycles per second for a
given PWM controller/channel.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add PWM driver support for Renesas RZ/A2M
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
PWM driver clears its runtime state on each suspend event.
However, since nrfx 4.0 integration nrfx driver instance is part
of the runtime state structure, so clear action must be limited.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
- Update the driver to support the kit_pse84_eval board
- Update to new peripheral clock allocation scheme
Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
Add pwm driver using tc g1 peripheral.
Adds the support for generating pwm output.
Supports 8-bit, 16-bit and 32-bit mode of tc peripheral
Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
When EC reboot, pwm pins go back to default GPI mode.
After we set pin mode to pwm mode at init(), it would
output low, so LED will be light (LED is low-activated).
And until set_cycles() is called to set output high,
then LED will be turn off the light (PWM-LED flicker).
So add the property to set PWM channel init output level.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Setting a prescaler of 256 would overflow the uint8_t.
Also get cycles calculation was wrong.
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
For stm32h7 the order matters to get the pwm to output the values as
expected. As reported for the the H730 doesn't produce PWM output when
the LL_TIM_OC_SetDeadTime is called after LL_TIM_EnableAllOutputs. So,
switch the order of the calls and this doesn't impact the stm32f413zh
boards.
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
The SAM4S pwm supports several events. This commit
implements the events when a channel period has ended
or a fault event has occured.
Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
Extend the PWM API to support events, as some
controllers allow interrupts if e.g., a pwm period
has ended or a fault occured.
Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
Enable clock control by default for siwx91x SoCs. Moreover, most
drivers for siwx91x soc depend on clock control, but didn't declare
it.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Most drivers for Series 2 depend on clock control, but didn't
declare it. Enable clock control by default for Series 2 SoCs.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
New nrfx release contains major rework of nrfx drivers
instantiation making it easier to integrate with dts nodes.
Now, nrfx driver instances can no longer be `const`
because they contain driver runtime state.
Additionally, all nrfx drivers return `errno` error codes
instead of deprecated `nrfx_err_t`.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Clean indentation in IRQ_CONNECT_AND_ENABLE_BY_NAME(), IRQ_CONFIG_FUNC()
and IRQ_CONNECT_AND_ENABLE_DEFAULT() macros of STM32 PWM driver.
Remove a useless trailing semi column character in the interrupt function
defined with IRQ_CONFIG_FUNC() macro.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
When using an stm32 in a bridge circuit with complementary outputs,
the deadtime needs to be configurable to avoid shoot-thru current
on the circuit. So, the HAL has the configuration in the BDTR init
and use that api access to set the configuration.
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
Use the "zephyr-keep-sorted-start/stop" comment to have CI check
the alphabetical order of includes, to help reducing the chance
of conflicts while contributing drivers.
Signed-off-by: Josuah Demangeon <me@josuah.net>
This fix addresses the issue encountered when power management (pm)
is enabled, as the PWM test suites utilize the GPIO driver, which
now incorporates the latest power domain enhancements and requires
CONFIG_POWER_DOMAIN to be enabled. Power domain functionality
manages device power actions such as turning on and off.
Accordingly, the pm device support for the pwm_silabs_siwx91x
driver has been updated to align with the recent power domain
improvements.
Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
Clocks are requested automatically by hardware on the nRF54H.
Remove additional handling from device drivers, and disable
the now unmanaged clocks in the devicetree.
Updates:
- can_nrf
- counter_nrfx_timer
- uart_nrfx_uarte
- spi_nrfx_spim
- spi_nrfx_spis
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The mcux_qtmr_pwm_set_cycles can not set 100% and 0%
duty cycle PWM wave.
Set output compare setting based on pulse_cycles and
period_cycles:
1. If pulse_cycles is 0, generate 0% duty cycle wave.
2. If pulse_cycles equals period_cycles but not 0,
generate 100% duty cycle wave.
3. Otherwise toggle output when compare value matched.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Add pwm driver using tcc g1 peripheral.
Adds the support for generating pwm output.
Supports both 16-bit and 24bit mode of tcc peripheral
Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
Redefine some macros due to different naming scheme in the header file.
Get the clock rate from the device tree when 'SOC_ATMEL_SAM_MCK_FREQ_HZ'
is not defined.
Signed-off-by: Tony Han <tony.han@microchip.com>
Replace the look-up table used to obtain the prescaler enumeration with
a simple multiplication.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Combine mode is not for all TPM IP depneds
on IP version, which is necessary for PWM capture feature.
Add pre-process check and wrap
mcux_tpm_capture_data with CONFIG_PWM_CAPTURE macro.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Usage of stm32xxxx_ll_tim.c has been removed so we can also remove the
selection of USE_STM32_LL_TIM from the Kconfig.
Also remove the LL_RCC that plays no part in the driver.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Invert property was not implemented and is now redundant with the flag
pwm-cell which is more flexible in case you want some IO to be inverted
and some not
Signed-off-by: Franck Duriez <franck.lucien.duriez@gmail.com>
# Conflicts:
# doc/releases/migration-guide-4.3.rst
Because the PWM module mixes byte and word register together, the driver
adds an assertion check by writing a pattern to the 2-byte register
`PRSC`, reading it back, and performing a comparison. However,
the `PRSC` register cannot be written when the bit 7 (the PWR bit) in
register `PMWCTLn` is set to 1. This commit moves the assertion check to
a proper place to ensure the write is valid.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
If two pwm_set_pulse_dt calls are put consecutive to each other,
the period has already been configured and they refer to the same module
but different submodule (PWM A & B), the second call fails.
LDOK with ReloadImmediate should result in immediate change of the
buffered registers, but it doesn't seem like that's the case.
To fix this, we busywait on LDOK clearance before setting new pulse values.
Fixeszephyrproject-rtos/zephyr#95653
Signed-off-by: Alejandro Perea <alejandro.perea@classified-cycling.cc>
Align the definition of the complementary channels to the normal channels.
That way, it is consistent for all arrays, we use channel-1 as index, and
no other operation is necessary.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This change reduces the level of pointer indirection, which minimizes
repeated dereferencing and helps reduce the overall code size, in the same
way as commit 48e326a5520ec884f38f6a7ac4e88c59a01ceb95 for UART.
This also fixes the type complimentary -> complementary.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove the calls to LL_TIM_xx_StructInit and LL_TIM_xx_Init in the PWM
driver. This avoids calling functions from stm32xxxx_ll_tim.c.
They are replaced by a set of simpler functions from the header file.
OC Init in particular is much simpler now. The init structure needed to be
filled out with the complementary channel (if it existed), even though its
configuration didn't change.
The new init is much more direct and only touches what needs to be
modified.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
On MMU-based systems, the address space of the IP needs to be mapped
before it can be used, otherwise the system will fault. Furthermore,
since the HAL driver uses the base address of the IP to perform various
operations (e.g. clock ungating), the map between the physical and
virtual addresses needs to be 1:1.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This change makes improvements and bug fixes for the Infineon PWM
driver. These include:
* Removes hard coded register addresss from driver.
* Addresses issues causing pwm_api and pwm_gpio_loopback tests to
fail, as well as functional failures.
* Restructures device tree file to better represent the hardware
architecture of the tcpwm module.
* Allows configuration of hardware behavior when PWM is disabled.
Signed-off-by: Bill Waters <bill.waters@infineon.com>
* Changes driver naming to reflect hardware IP being used (TCPWM)
instead of referencing cat1. Cat1 is an internal infineon
reference which has little meaning to users and is being phased
phased out.
Signed-off-by: Bill Waters <bill.waters@infineon.com>
This commit fixes the bug in the prescaler configuration formula.
Prescaler enumarations values are not consecutive numbers, so this
formula does not work correctly. This commit adds prescaler enums into
an array and sets PWM prescaler from this array with using
prescaler_index parameter.
Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
