Do not allow CONFIG_PM_DEVICE_SYSTEM_MANAGED when fast PWM instance
is used.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
When using low PWM frequency i.e 50Hz the resolution of pulse_cycles
got lost from converting pulse_cycles to duty cycle % and then back to
pulse_cycles again.
Furthermore TPM_UpdateChnlEdgeLevelSelect call would restart the pwm
constantly on a mcux_tpm_set_cycles call now only call
TPM_UpdateChnlEdgeLevelSelect when changing the polarity
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
Drivers update to use shared interrupt allocator for Xtensa
and RISCV devices.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
On IMX9596 the AON/WU clocks aren't controllable are on by default.
But TPM1 and TPM3 uses the clocks, by not enabling these clocks
on both TPM1/TPM3 will initialize succesfully.
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
- The current code will cause stall if some other subsystem (like subg)
also needs to manage pm states.
- So add a check to only re-enable suspend if it was disabled by PWM.
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
Since the RA2L1 uses the macro "ICU_EVENT" instead of
"ELC_EVENT" (which is currently used) to input into
the IELSR register, the ek_ra2l1 board cannot assign
any interrupts for any driver.
This commit aim to correct the Event macro to input correct
value for IELSR register on all the Renesas SoC by using
"BSP_PRV_IELS_ENUM" macro.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Fast PWM120 prevents GPIO from driving pin with low/high
state when PWM duty is 0% or 100%. In such case, regular
PWM signal generation needs to be used.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Drop few redundant device_is_ready for functions that are only used as
argument to shell_device_filter, as shell_device_filter checks for that
alrady.
Suggested-by: Yishai Jaffe <yishai1999@gmail.com>
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add inverted flag to bindings, as pwms field is supposed
to be used by application only.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Include condition to block pwm_set operation when the same timer
is shared but a different frequency is requested. First set
operation will take precedence.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Cleanup and functions organization. Clock source selection added
to init to allow proper setting of default level when signal is
inverted.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Disable PWM output for duty 0% or 100%, to allow using max timers
resolution. Move timer reset to init function in order to ensure
smooth frequency transitions.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
At driver init channels frequency are unknown, thus timer config
may take place only at set_cycles(). To avoid phase shifts,
timers are only reconfigured if a new frequency is requested.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Set pwm init state to value defined in flags field.
Furthermore 100 percent is now actually 100 percent and not 99.
Signed-off-by: Armin Kessler <ake@espros.com>
This PR enables the PWM to be inverted by making use of the
`PWM_POLARITY_INVERTED` flag.
It also fixes an overflow bug when setting duty-cycle to 100 percent.
Signed-off-by: Armin Kessler <ake@espros.com>
This adds support PWM EMIOS for NXP S32Z SoC, both PWM pulse
generate and pulse capture are supported
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Removing period, duty and polarity configuration from
channel devicetree. At boot time, only minimal setup like
pinctrl, prescaler, etc should be initialized. PWM signal
is produced by using pwm_set* API
Also after this change, PWM period, duty are changed at the
next counter period boundary
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Refactor and merge the SoC support files for the Atmel SAM E70 and SAM V71
product series. These SoCs are part of a larger product family (SAM
E70/S70/V70/V71) and share a common set of peripherals.
Support for the two remaining product series (SAM S70/V70) is not part of
this refactoring as these will require further additions to the Atmel HAL.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Move the SAM V71 register name fixup from the SoC code into the PWM driver
next to the other PWM driver fixup.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Rename "nxp,kinetis-ftm-pwm" compatible to "nxp,ftm-pwm" to remove the
device family from its name.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Use shell_device_get_binding() instead of device_get_binding() so that
we get the device based on its name and in addition by its label.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
This runs the Timer/counter in 'normal' PWM mode (for 8-bits)
and in 'match' PWM mode (for 16-bits).
Signed-off-by: Teresa Zepeda Ventura <teresa.zvent@gmail.com>
Remove deprecated functions to comply with new HAL versions.
Handle capture interrupts more appropriately by clearing status
bit for only one channel.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
These device driver APIs were merged after the DEVICE_API macro was
introduced.
Cleanup these leftover drivers.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
- Move selection of CONFIG_PINCTRL from soc to individual
drivers
- in accordance with issue #78619
Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
Fast PWM120 instance works with 320MHz clock, thus
pwm_nrfx_get_cycles_per_sec needs to be adjusted,
applying correct clock frequency.
Also, it uses cachable RAM, thus sys_cache function
needs to be added to flush the cached sequence.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Allow configuring the clock prescaler divider for the NXP Kinetis
Timer/PWM Module (TPM). Setting the prescaler to a lower value
allows for higher resolution for the generated PWM waveforms.
This change is inspired from the pwm_mcux_ftm driver:
Link: https://github.com/zephyrproject-rtos/zephyr/pull/25396
Signed-off-by: Maximilian Werner <maximilian.werner96@gmail.com>
The `Kconfig.defconfig` is not good place for put `select PINCTRL`.
Drop `select PINCTL` from `Kconfig.defconfig` and add it at each
driver's Kconfig.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
