Commit graph

100 commits

Author SHA1 Message Date
Mathieu Choplain
7e1074631e drivers: pwm: stm32: add support for STM32WB0
This commit adds support for the STM32WB0 series to
the existing STM32 PWM driver.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-01-14 20:49:30 +01:00
Yishai Jaffe
e5017da2b0 drivers: pwm: Place API into iterable section
Add wrapper DEVICE_API macro to all pwm_driver_api instances.

Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
2024-12-06 12:13:28 +01:00
Jeppe Odgaard
bb88d5f1f1 drivers: pwm: pwm_stm32: remove capture overflow log err
The `LOG_ERR` will spam the log if the window is low e.g. 1 ms.
Also the PWM capture callback will be called with an error, which allows
handling and logging the error if desired.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2024-09-25 04:01:59 -04:00
Fabrice DJIATSA
d2ddb6541d drivers: pwm: update stm32 pwm driver
add stm32u0x soc configuration to be able to
run test on new boards.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2024-09-23 10:02:16 +02:00
Marek Sroka
226e381d6e drivers: pwm: pwm_stm32: Add error log for 16-bit timer buffer overflow
If the value in the period_cycles variable exceeds UINT16_MAX, a 16-bit
timer will return an error code 134. An error message was added to
indicate that the value does not fit into the 16-bit timer register.
An error message advising developers to reduce the value to 16-bit
simplifies the process, allowing them to understand immediately that
reducing the value will resolve the issue.

Signed-off-by: Marek Sroka <m.sroka14@gmail.com>
2024-08-16 16:29:49 +01:00
IBEN EL HADJ MESSAOUD Marwa
99fd91bf1c drivers: pwm: pwm_stm32: G4X changes
Use "const LL_TIM_IC_GetCaptureCHx" & "const LL_TIM_IsActiveFlag_CCx"
with STM32G4X series, following changes in stm32cube:stm32g4xx:drivers:
include:stm32g4xx_ll_tim.h

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
2024-05-13 14:23:52 +02:00
IBEN EL HADJ MESSAOUD Marwa
820cf4d639 drivers: pwm: pwm_stm32: F4X changes
Use "const LL_TIM_IC_GetCaptureCHx" & "const LL_TIM_IsActiveFlag_CCx"
with STM32F4X series, following changes in stm32cube:stm32f4xx:drivers:
include:stm32f4xx_ll_tim.h

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
2024-05-13 14:23:52 +02:00
Fabian Pflug
3c0a6058b5 drivers: pwm: stm32: Catch overflows in 2-channel capture
When not using 4 channel capture, overflows were never reported
to the application, because the check was in the
four_channel_capture_support branch.

Signed-off-by: Fabian Pflug <fabian.pflug@grandcentrix.net>
2024-01-03 12:55:50 +01:00
Abderrahmane Jarmouni
7bf996d3a7 drivers: pwm: pwm_stm32: F1X changes
Use "const LL_TIM_IC_GetCaptureCHx" & "const LL_TIM_IsActiveFlag_CCx"
with STM32F1X series, following changes in stm32cube:stm32f1xx:drivers:
include:stm32f1xx_ll_tim.h

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2023-12-06 12:10:08 +00:00
Hein Wessels
1732651062 drivers: pwm: stm32: support capturing on four channels
Previously the pwm capture only support capturing on channel 1
and 2, because the slave mode controller was used, which uses
the signal TIxFP which is not available for channel 3 and 4.

This commit adds optional support for four channel capturing by
changing the method of capturing PWM signals to not use the
slave mode controller to reset the counter register. Instead the
counter is reset in the ISR. This will result in a slight loss
of accuracy but is still within an acceptable range.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-09-07 09:42:25 +02:00
Sean Nyekjaer
25d496949f drivers: pwm: pwm_stm32: reset timer using RCC before initialization
If a timer is left running on an stm32mp1, (most likely) on the next run
the timer is stuck.
A simple timer reset before initialization fixes the issue.

Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2023-07-20 10:36:10 +00:00
Sean Nyekjaer
63fa033d11 drivers: pwm: pwm_stm32: add macro for using DT_INST_PARENT()
Make device init more readable by adding a macro

Suggested-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2023-07-20 10:36:10 +00:00
Sean Nyekjaer
9eebaf8b60 drivers: pwm: stm32: read clock divider register for stm32mp1 boards
Since clocks aren't declared in the devicetree for the stm32mp1
co-processor. Read the resulting clock divider here instead.

Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2023-07-06 09:44:01 +00:00
Savent Gate
e2c39313ac drivers: pwm: pwm_stm32: Add 6-PWM support
User can use 6-PWM motor driver in dts like this below:
```dts
pwms =
 // ch1,ch2,ch3,ch1n,ch2n,ch3n
 <&pwm 1 PWM_USEC(50) PWM_POLARITY_NORMAL>, // ch1
 <&pwm 2 PWM_USEC(50) PWM_POLARITY_NORMAL>, // ch2
 <&pwm 3 PWM_USEC(50) PWM_POLARITY_NORMAL>, // ch3
 <&pwm 1 PWM_USEC(50) (PWM_POLARITY_NORMAL|STM32_PWM_COMPLEMENTARY)>,
 <&pwm 2 PWM_USEC(50) (PWM_POLARITY_NORMAL|STM32_PWM_COMPLEMENTARY)>,
 <&pwm 3 PWM_USEC(50) (PWM_POLARITY_NORMAL|STM32_PWM_COMPLEMENTARY)>;
```

Signed-off-by: Savent Gate <savent_gate@outlook.com>
2023-05-15 09:15:01 +00:00
Marek Metelski
d55b0a410d drivers: pwm: stm32: Connect IRQ for input capture by 'cc' name
Some STM32 timers have more than one interrupt available.
When such timer is used it's likely that the first found interrupt
will not be the proper, 'cc' interrupt for input capture.

Existing implementation always connected the first irq, which worked
for timers with single, 'global' interrupt but broke input capture
for advanced timers with more interrupts.

Improve the IRQ connection logic by connecting the 'cc' interrupt
if it exists. Only if not found use the fallback mechanism of taking the
first index

Signed-off-by: Marek Metelski <marek@metelski.dev>
2023-04-28 20:38:02 +02:00
Pieter De Gendt
6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Benjamin Björnsson
a52bd0d2e9 drivers: pwm: pwm_stm32: Add PWM support on STM32C0-seris
Add support for PWM on the STM32C0-series.

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2023-03-21 09:38:25 +01:00
Francois Ramu
210e0b76bf dts: bindings: pwm custom macro for STM32 vendor
Change the name of the custom macro defined for the stm32 devices
to fit the VND_PWM_xxx model
Keeping old deprecated macro, though.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-24 14:49:53 +01:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Nick Ward
0ad0af70ef drivers: pwm: Use a common initialization priority
As per other peripheral driver types.

Signed-off-by: Nick Ward <nix.ward@gmail.com>
2022-10-03 15:24:38 -04:00
Kumar Gala
9a7e4b162d pwm: stm32: Remove support for deprecated st,prescaler prop
Remove code that supported deprecated st,prescaler devicetree property.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-18 10:20:32 +02:00
Henrik Brix Andersen
c8a5d058aa drivers: pwm: check if clock device is ready before accessing
Add check for device_is_ready() before accessing clock control devices.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-08-09 17:16:16 +02:00
Gerard Marull-Paretas
0aea96dbca drivers: pwm: minor formatting enhancements
Some formatting tweaks to improve the outcome of clang-format.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-12 17:51:23 +02:00
Gerard Marull-Paretas
fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Georgij Cernysiov
1520820bff drivers: pwm: stm32: fix PWM channel disabling
Move period and pulse computation to right before
the channel enable code.

That fixes the inability to disable the channel by
providing the period of 0.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-05 14:36:56 -05:00
Gerard Marull-Paretas
e2852ef985 drivers: pwm: use new API naming (no pin)
Use the API names without `_pin`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 11:29:38 +02:00
Gerard Marull-Paretas
fbf73334f3 drivers: pwm: make all drivers use channel variable name
The variable indicating the PWM channel is now names "channel" instead
of "pwm", adjust all drivers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-28 11:29:38 +02:00
Georgij Cernysiov
3650664875 drivers: pwm: stm32: support counter modes
Adds support for different timer counter modes.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-04-15 11:59:16 -07:00
Georgij Cernysiov
366bf47c27 drivers: pwm: stm32: remove obvious comments
Removes obvious comments from the PWM
configuration struct.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-04-15 11:59:16 -07:00
Gerard Marull-Paretas
0c908706fb drivers: pwm: remove duplicated pulse > period checks
The API call checks for this condition before calling the pin_set driver
OP call, so drivers don't have to do this check now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-07 09:35:05 +02:00
Francois Ramu
90d1644a10 drivers: pwm: stm32 can initialize the PWM complementary output
If the dts defines the PWM complementary output, then the OCN
must be init in place of the OC state and polarity.
This is an exclusive setting for this pin.
The channel in LL_TIM_OC_SetPolarity can be the complementary one.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-03-31 10:28:47 +02:00
Francois Ramu
5d9cbbc658 drivers: pwm capture with stm32 can have no callback
When configuring the pwm capture,  the callback function might
be reset, this i not an error. However the isr should not call it
and enabling the capture should always provide a callback function.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-03-17 16:34:54 -05:00
Gerard Marull-Paretas
5dc6ed3ce3 pinctrl: require ; after PINCTRL_DT_(INST_)DEFINE macros
The PINCTRL_DT_(INST_)DEFINE macros already defined the trailing ;,
making its usage inconsistent with other macros such as
DEVICE_DT_DEFINE.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-01 07:39:08 -05:00
Gerard Marull-Paretas
bda8878b03 drivers: pwm: stm32: use instance based macros
Replace usage of DT_DRV_INST with instance based macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-12-17 17:30:06 +01:00
Gerard Marull-Paretas
3e9d8da9ec drivers: use DT_INST_PARENT
Replace usages of DT_PARENT(DT_DRV_INST(idx)) with more idiomatic
DT_INST_PARENT(idx).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-12-16 11:10:01 -06:00
Erwan Gouriou
eff3ad6df7 drivers/pwm: stm32: use new pinctrl API
Use the new pinctrl API to configure pins.
Since STM32F1 series require pinctrl option and required register
address is parent timer address in place of own node register address,
use PINCTRL_DT_INST_CUSTOM_REG_DEFINE in place of usual
PINCTRL_DT_INST_DEFINE for this specific series.

Additionally, remove the automatic selection of PINMUX API.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Tilmann Unte
38e89c90a5 drivers: pwm: stm32: add pwm capture support
Extends STM32 PWM driver to support capturing pulse width, period,
or both.

The approach used is based on the PWM Input sections in reference
manual RM0351 by ST in the chapters on timers.
The LL library by ST is used for all extensions to the driver.

Only the disco_l475_iot1 board was available for testing on hardware,
using tests/drivers/pwm/pwm_loopback.
Since timers are a generic component, it is assumed that other STM32
boards will behave the same

Fixes #39394

Signed-off-by: Tilmann Unte <unte@es-augsburg.de>
2021-11-22 22:24:45 -05:00
Alexandre Bourdiol
3a60344522 drivers: pwm: stm32: move "st,prescaler" to timers instead of pwm
Prescaler was misplaced in pwm binding, instead of timers binding.
For example, TIM6/TIM7 doesn't have PWM capability,
but have a prescaler.
This change also prepares the introduction of timer based counter
(which requires prescaler at timer level)
For compatibility reason temporarily use pwm prescaler if it exists,
otehrwise use timers prescaler.
And thus avoid to avoid breaking boards out of tree.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-11-16 09:55:30 -06:00
Erwan Gouriou
fcc3177509 drivers/pinmux: stm32: Move stm32 driver from stm32/
Since we removed various series headers, move stm32 driver
under main driver/pinmux folder.
Take this change into account into various drivers.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-06-11 08:04:39 -05:00
Erwan Gouriou
07e5644ac6 drivers/pwm: stm32: Leftovers in clock_control conversion to dts
Fix omissions.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-05 16:51:02 -05:00
Gerard Marull-Paretas
3b18fe0af7 drivers: pwm: remove usage of device_pm_control_nop
device_pm_control_nop is now deprecated in favour of NULL.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-28 16:43:29 -04:00
Erwan Gouriou
2691541ad2 drivers/clock_controller: stm32: Prepare for dts based configuration
To allow transition to device tree based clock configuration on
stm32 targets, rework clock_control driver to use intermediate
STM32_ macros initially defined as the equivalent Kconfig macros
for now.
Propagate the change in all code using these macros.

The reason to introduce these new macros instead of configuring
Kconfig flags using dt kconfigfunctions is that we'll need
to be able to inform users that Kconfig flags are deprecated
once the whole family conversion is done, to encourage
out of tree users to adopt this new configuration scheme.

Note: For now STM32H7 series and code is excluded.
This is the same for some series specific code such as
PLL mul/div for L0/L1 and XTRE prescaler on F1 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-27 11:53:37 +02:00
Sidhdharth Yadav
e2a29bf6a4 drivers: pwm: Adding a flag to allow build for stm32l1 series
Include a flag to allow build for stm32l1 series

Signed-off-by: Sidhdharth Yadav <sidhdharth.yadav@hcl.com>
2021-04-22 11:29:34 +02:00
Gerard Marull-Paretas
0b07077a5c drivers: pwm: stm32: fix expansion-to-defined warning
The definition to check if timers have up to 6 channels was causing
warnings when -Wexpansion-to-defined was enabled.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-02-18 07:19:39 -05:00
Kumar Gala
b275fec8c4 soc: stm32: convert to use DEVICE_DT_GET for clocks
Convert from device_get_binding to DEVICE_DT_GET.  In doing this we
no longer need the label in the devicetree node so we remove that.

Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 17:01:37 -06:00
Martin Jäger
d6648b6124 drivers: pwm: stm32: add support for L0 series
The STM32L0 series MCUs have quite basic timer features only, so we
remove some unavailable configuration options. They were properly
initilized by the LL StructInit functions for other MCUs anyway.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-12-17 10:25:34 -05:00
Kumar Gala
d3790cec95 drivers: pwm: Convert drivers to new DT device macros
Convert pwm drivers to use new DT variants of the DEVICE APIs.
        DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-12-10 07:25:29 -05:00
Martin Jäger
fc1c284c9c drivers: pwm: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Gerard Marull-Paretas
6b81695946 drivers: pwm: stm32: fix timer clock calculation
Calculation of the timer clock was wrong for some F4/F7/H7 series.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-03 11:03:54 +01:00
Alexandre Bourdiol
c47a5d4a36 drivers: pwm: pwm_stm32.c: enable ARR preload
Enable ARR preload so that period or pulse updates are taken
into account synchronously with update event
(at the end of a ongoing period)
And thus avoid undetermined intermediate pulse.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-10-30 15:59:32 +01:00