Use "const LL_TIM_IC_GetCaptureCHx" & "const LL_TIM_IsActiveFlag_CCx"
with STM32G4X series, following changes in stm32cube:stm32g4xx:drivers:
include:stm32g4xx_ll_tim.h
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Use "const LL_TIM_IC_GetCaptureCHx" & "const LL_TIM_IsActiveFlag_CCx"
with STM32F4X series, following changes in stm32cube:stm32f4xx:drivers:
include:stm32f4xx_ll_tim.h
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
When not using 4 channel capture, overflows were never reported
to the application, because the check was in the
four_channel_capture_support branch.
Signed-off-by: Fabian Pflug <fabian.pflug@grandcentrix.net>
Use "const LL_TIM_IC_GetCaptureCHx" & "const LL_TIM_IsActiveFlag_CCx"
with STM32F1X series, following changes in stm32cube:stm32f1xx:drivers:
include:stm32f1xx_ll_tim.h
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Previously the pwm capture only support capturing on channel 1
and 2, because the slave mode controller was used, which uses
the signal TIxFP which is not available for channel 3 and 4.
This commit adds optional support for four channel capturing by
changing the method of capturing PWM signals to not use the
slave mode controller to reset the counter register. Instead the
counter is reset in the ISR. This will result in a slight loss
of accuracy but is still within an acceptable range.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
If a timer is left running on an stm32mp1, (most likely) on the next run
the timer is stuck.
A simple timer reset before initialization fixes the issue.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Since clocks aren't declared in the devicetree for the stm32mp1
co-processor. Read the resulting clock divider here instead.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Some STM32 timers have more than one interrupt available.
When such timer is used it's likely that the first found interrupt
will not be the proper, 'cc' interrupt for input capture.
Existing implementation always connected the first irq, which worked
for timers with single, 'global' interrupt but broke input capture
for advanced timers with more interrupts.
Improve the IRQ connection logic by connecting the 'cc' interrupt
if it exists. Only if not found use the fallback mechanism of taking the
first index
Signed-off-by: Marek Metelski <marek@metelski.dev>
Change the name of the custom macro defined for the stm32 devices
to fit the VND_PWM_xxx model
Keeping old deprecated macro, though.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move period and pulse computation to right before
the channel enable code.
That fixes the inability to disable the channel by
providing the period of 0.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
The variable indicating the PWM channel is now names "channel" instead
of "pwm", adjust all drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The API call checks for this condition before calling the pin_set driver
OP call, so drivers don't have to do this check now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If the dts defines the PWM complementary output, then the OCN
must be init in place of the OC state and polarity.
This is an exclusive setting for this pin.
The channel in LL_TIM_OC_SetPolarity can be the complementary one.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When configuring the pwm capture, the callback function might
be reset, this i not an error. However the isr should not call it
and enabling the capture should always provide a callback function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The PINCTRL_DT_(INST_)DEFINE macros already defined the trailing ;,
making its usage inconsistent with other macros such as
DEVICE_DT_DEFINE.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace usages of DT_PARENT(DT_DRV_INST(idx)) with more idiomatic
DT_INST_PARENT(idx).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use the new pinctrl API to configure pins.
Since STM32F1 series require pinctrl option and required register
address is parent timer address in place of own node register address,
use PINCTRL_DT_INST_CUSTOM_REG_DEFINE in place of usual
PINCTRL_DT_INST_DEFINE for this specific series.
Additionally, remove the automatic selection of PINMUX API.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Extends STM32 PWM driver to support capturing pulse width, period,
or both.
The approach used is based on the PWM Input sections in reference
manual RM0351 by ST in the chapters on timers.
The LL library by ST is used for all extensions to the driver.
Only the disco_l475_iot1 board was available for testing on hardware,
using tests/drivers/pwm/pwm_loopback.
Since timers are a generic component, it is assumed that other STM32
boards will behave the same
Fixes#39394
Signed-off-by: Tilmann Unte <unte@es-augsburg.de>
Prescaler was misplaced in pwm binding, instead of timers binding.
For example, TIM6/TIM7 doesn't have PWM capability,
but have a prescaler.
This change also prepares the introduction of timer based counter
(which requires prescaler at timer level)
For compatibility reason temporarily use pwm prescaler if it exists,
otehrwise use timers prescaler.
And thus avoid to avoid breaking boards out of tree.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Since we removed various series headers, move stm32 driver
under main driver/pinmux folder.
Take this change into account into various drivers.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To allow transition to device tree based clock configuration on
stm32 targets, rework clock_control driver to use intermediate
STM32_ macros initially defined as the equivalent Kconfig macros
for now.
Propagate the change in all code using these macros.
The reason to introduce these new macros instead of configuring
Kconfig flags using dt kconfigfunctions is that we'll need
to be able to inform users that Kconfig flags are deprecated
once the whole family conversion is done, to encourage
out of tree users to adopt this new configuration scheme.
Note: For now STM32H7 series and code is excluded.
This is the same for some series specific code such as
PLL mul/div for L0/L1 and XTRE prescaler on F1 series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The definition to check if timers have up to 6 channels was causing
warnings when -Wexpansion-to-defined was enabled.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Convert from device_get_binding to DEVICE_DT_GET. In doing this we
no longer need the label in the devicetree node so we remove that.
Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The STM32L0 series MCUs have quite basic timer features only, so we
remove some unavailable configuration options. They were properly
initilized by the LL StructInit functions for other MCUs anyway.
Signed-off-by: Martin Jäger <martin@libre.solar>
Convert pwm drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Enable ARR preload so that period or pulse updates are taken
into account synchronously with update event
(at the end of a ongoing period)
And thus avoid undetermined intermediate pulse.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The parameters of the associated PWM timer were not being picked up
properly, as it was assumed that parent index is the same as the child
index. This is not necessarily true if other timer nodes are active and
not being used for PWM.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Set stm32_dt_pinctrl_configure function as the unique entry point
to STM32 DT pinctrl management.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move pinctrl remap functions out of stm32f1 definition in order
to get it available to all series.
Allows use of more IS_ENABLED macros in calling drivers and make
code more readable.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to be in line with other DT_INST macros in zephyr code base,
swap the arguments order in following macro definitions:
*ST_STM32_DT_PINCTRL
*ST_STM32_DT_INST_PINCTRL
Update the users accordingly.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
