Commit graph

17 commits

Author SHA1 Message Date
Ioannis Karachalios 02e739873e drivers: memc: smartbond: Add support for the memory driver class.
Add support for the memory controller by utilizing QSPIC2. The latter is
capable to drive both NOR and PSRAM memory devices. For this to work,
the RAM driving mode is enabled.

Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
2024-05-23 07:51:41 -04:00
Daniel DeGrasse 23bb8fc6ae drivers: memc: add driver for is66wvq8m4 PSRAM using MCUX FlexSPI
Add driver for IS66WVQ8M4 PSRAM, using the MCUX FlexSPI interface to
write data to the PSRAM device.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-05-07 15:06:25 -05:00
Declan Snyder 97d991f7d6 drivers: memc: Add NXP FlexRAM driver
Add driver for NXP FlexRAM

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-13 09:42:28 +01:00
Mourad Kharrazi 651c841faa drivers: hyperram: Add Winbond W956A8MBYA driver
Adding hyperram support for Winbond W956A8MBYA

Signed-off-by: Mourad Kharrazi <mourad.kharrazi@ithinx.io>
2023-08-15 21:51:57 +00:00
Manuel Argüelles 5dad944351 drivers: memc: add NXP S32 QSPI controller
The NXP S32 QSPI controller acts as an interface to up to two serial
flash memory devices, each with up to eight bidirectional data lines,
depending on the platform. It is based on a LUT enginee to interface
through commands with different memory types including flash NOR and
Hyperram.

This patch adds support for the QSPI in S32K344 which supports a single
memory device (side A) with up to four bidirectional data lines and SDR
only. Nevertheless, the memory controller is implemented flexible enough
to be extended to support more feature-rich QSPI blocks.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-07-26 09:44:14 +02:00
Franciszek Zdobylak 71a6c22731 drivers: memc: implement sifive ddr mem controller
Implementation for DDR memory controller for FU740 SoC.

Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
2023-04-12 13:05:55 +02:00
Daniel DeGrasse 47271ce8be treewide: update usage of zephyr_code_relocate
Update usage of zephyr_code_relocate to follow new API. The old method
of relocating a file was the following directive:

zephyr_code_relocate(file location)

The new API for zephyr_code_relocate uses the following directive:

zephyr_code_relocate(FILES file LOCATION location)

update in tree usage to follow this model. Also, update the NXP HAL SHA,
as NXP's HAL uses this macro as well.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-17 18:08:37 +01:00
Daniel DeGrasse 64a14a8c1c drivers: memc: introduce driver for APS6408L PSRAM
Introduce driver for APS6408L PSRAM, built on top of the MCUX memc
driver for flexSPI. This driver supports operating the PSRAM in high
speed mode (200MHz or more). Note that in order to support this
PSRAM's alignment requirements, either ahb-read-addr-opt or
ahb-prefetch must be set for the FlexSPI instance.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-04 10:35:25 +01:00
Daniel DeGrasse 0aba1a80b1 drivers: memc: rename flexspi-hyperram driver to flexspi-s27ks0641
Rename flexspi-hyperram driver to flexspi-s27ks0641, and update
function names. This driver is only capable of supporting the
s27ks0641 HyperRAM chip, as the lookup table given in this driver
is specific to the s27ks0641.

Rename the flexspi-hyperram binding to reflect this, to
prevent confusion from users.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-04 10:35:25 +01:00
Daniel DeGrasse a5994dbd1a drivers: memc: don't relocate MEMC functions unless CONFIG_FLASH=y
Only relocate memc driver when CONFIG_FLASH=y.
CONFIG_FLASH_MCUX_FLEXSPI_XIP previously was dependent on
CONFIG_FLASH, but the scope of this Kconfig has changed.

Due to this, the memc driver now must have two checks, as it should not
relocated when the driver is being used for a memory controller that does
not expose the flash driver interface.

Since the NXP HAL also relocates the underlying FlexSPI driver
using a similar check, it is updated in this commit as well.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-03 12:20:39 -06:00
Pieter De Gendt e328c2bb7d drivers: memc: Introduce Atmel SAM SMC/EBI driver
Add a driver to support external memory connected to the SMC port
for Atmel SAM devices.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-08-16 12:53:50 +02:00
Georgij Cernysiov cf9df290da drivers: memc: stm32: add FMC NOR/PSRAM driver
Adds STM32 FMC NOR/PSRAM controller driver.

The implementation follows FMC SDRAM driver
approach and uses HAL API. Tested on H7 series.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-04-19 11:47:06 +02:00
Daniel Leung 2880a49198 drivers: memc: build as static library
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-08-17 06:06:03 -04:00
Pieter De Gendt add98e766a drivers: flash: Support i.MX FlexSPI NOR driver with XIP
This change allows writing to the flash while running in XIP mode,
and enables mcuboot or NVS settings to be used on i.MX RT socs.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-15 16:26:39 -05:00
Pieter De Gendt 7f46a59a42 drivers: memc: Introduce i.MX RT FlexSPI HyperRAM driver
Add the FlexSPI HyperBUS driver to support HyperRAM external
devices.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-02 10:36:22 -05:00
Pieter De Gendt acca3c126c mcux flexspi: move bus driver to drivers/memc
Initially the flexspi device only supported a flash driver for
external NOR flash. As the controller supports HyperBus devices,
which can be either volatile or non-volatile, the driver iss moved
to drivers/memc.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-02 10:36:22 -05:00
Gerard Marull-Paretas e671d363b8 drivers: memc: stm32: initial support for stm32 FMC
This commit adds a new driver category for memory controller
peripherals. There is no API involved for now, as it has not been found
necessary for first implementation.

STM32 Flexible Memory Controller (FMC) is the only controller supported
for now. This peripheral allows to access multiple types of external
memories, e.g. SDRAM, NAND, NOR Flash...

The initial implementation adds support for the SDRAM controller only.
The HAL API is used, so the implementation should be portable to other
STM32 series. It has only been tested on H7 series, so for now it can
only be enabled when working on H7.

Linker facilities have also been added in order to allow applications to
easily define a variable in SDRAM.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-24 16:33:17 +01:00