Commit graph

1230 commits

Author SHA1 Message Date
Francois Ramu
7f10bd6340 drivers: flash: stm32 qspi driver setting dma priority
This adds a table to set the dma channel priority from the DTS
The config bits are converted through the table_priority
to match the DMA_Priority_level of the stm32cube HAL.
Fixes #46725

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-06-23 09:11:15 +02:00
Aurelien Jarno
e245a213df drivers: flash: stm32h7x: simplify wait_write_queue()
wait_write_queue() get passed a device and an offset to compute the
sector number and verify it is valid. However both operations are
already done by the caller, so let's pass directly the
flash_stm32_sector_t value instead.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-06-20 09:18:23 -04:00
Aurelien Jarno
c337b9f80b drivers: flash: stm32h7x: use barriers to ensure the writes are flushed
The STM32H7 flash driver read-back a register after writing it to ensure
it is flushed. This is very fragile and might break if a new compiler
version slightly reorder the instructions. Instead use a __DSB()
barrier like done on other STM32 SoC, which ensures that the registers
and the data writes are flushed at the compiler level, but also at the
Cortex-M7 level.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-06-20 09:18:23 -04:00
Aurelien Jarno
67bceb0257 drivers: flash: stm32h7x: use max-erase-time instead of hard-coded timeout
As the erase time for a sector differs by a few order of magnitude for the
various SoCs of the STM32H7 family, use the just added max-erase-time
property from the device tree instead of the hard-coded 4 seconds value.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-06-20 09:18:23 -04:00
Georgij Cernysiov
bf974902bf drivers: flash: stm32: ospi: writing single, dual and quad modes
Support writing to NOR-Flash over OSPI using
the following modes:

* 1-1-1
* 1-1-4
* 1-4-4

Supports 4-Byte opcodes conversion for write opcodes.

Allows users to set what write/program opcode is used
in the DTS (not for OPI mode).
Will use some default PP opcodes based on the mode.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-06-16 10:29:15 +02:00
Georgij Cernysiov
f278db7071 drivers: flash: stm32: ospi: support SFDP quad enable requirements
Adds support for `quad enable requirements` DTS property.

Parses SFDP:BFP DW15 (QER related) and uses it (if available),
it bypasses the DTS property.

Automatically enables quad mode (if required).

Supports every DW15 QER modes.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-06-16 10:29:15 +02:00
Georgij Cernysiov
871ded0e65 drivers: flash: stm32: ospi: read/erase single, dual and quad modes
Adds support to read and erase NOR-Flash over OSPI using
the following modes:

* 1-1-2
* 1-2-2
* 1-1-4
* 1-4-4

Supports 4-Byte opcodes conversion and gets address width
from the SFDP:BFP.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-06-16 10:29:15 +02:00
Georgij Cernysiov
e6ec77a243 drivers: flash: spi_nor: adds missing PP and Read cmd defines
Adds:
* PP and Read 4-Byte command defines
* PP 1-1-2 define
* Missing 1-2-2 (0xBB) and Read Fast (0x0B) command defines

Re-arranges the commands so that they stay in order.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-06-16 10:29:15 +02:00
Keith Packard
c4d71b3fc0 drivers/flash: Use array instead of char for _ram_code_start
When defined as 'char', the compiler notices that the memcpy targeting that
address will write more than one byte which generates a warning. Use an
array instead so that the compiler doesn't assume a specific size.

Signed-off-by: Keith Packard <keithp@keithp.com>
2022-06-14 01:50:36 +09:00
Chay Guo
a4c9e13ea8 boards: arm: Enable flash for storage on mimxrt595_evk
- The MX25UM51345G flash is connected to FLEXSPI PortA for
  mimxrt595_evk.
- Updated flexspi_mx25um51345g driver to support DTR OPI mode.
- Tested with tests/drivers/flash.

Signed-off-by: Chay Guo <changyi.guo@nxp.com>
2022-06-13 12:10:57 +02:00
Piotr Dymacz
360d70a91e drivers: flash: introduce on-chip flash driver for TI CC13xx/CC26xx
This includes a basic driver for built-in flash on the Texas Intruments
SimpleLink CC13xx/CC26xx SoC series.

The driver makes use of driverlib HAL from TI's SDK and was tested on
two LaunchXL development boards with CC1352R and CC2652R SoCs:

- CC1352R1 LaunchXL
- CC26x2R1 LaunchXL

Tests were done using:

- flash shell sample (samples/drivers/flash_shell)
- littlefs filesystem sample (samples/subsys/fs/littlefs)*
- MCUboot (bootloader/mcuboot/boot/zephyr)*

  * additional changes in DTS for the boards were required (partitions
    table) and are not part of this changeset (will be introduced later)

Some additional information about the implementation:

1. TI's Technical Reference Manual for CC13x2 and CC26x2 points out that
   "An individual 64-bit word can be programmed to change bits 1 to 0"
   but it seems this 'alignment' requirement is handled internally by
   the ROM function and thus 'write-block-size' is set to 1.

2. Interrupts, VIMS and line buffers are disabled during flash content
   update (write or erase) and restored afterwards as recommended by TI.

3. Only RAM to flash write is supported (source of data to be written to
   flash can't point to flash).

4. The driver doesn't take care of flash sector protection disable as
   that functionality is handled by CCFG. Write or erase requests which
   refer to a protected area will fail.

Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
2022-06-06 14:01:27 -07:00
Yuriy Vynnychek
e36d481893 drivers: flash: Improve Telink B91 Flash Write and Erase APIs
- Fixed from Flash to Flash write issue (added heap usage).
- Speed up Flash Erase operation (based on erase size).

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-06-05 14:45:38 +02:00
Mahesh Mahadevan
d801323e23 drivers: hyperflash: Use write-block-size property
Use the write-block-size devicetree property instead
of a #defined value

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-06-05 14:45:18 +02:00
Andrzej Puzdrowski
95d867e8ed drivers/flash/nrf_qspi_nor: fix for missing device deactivation.
anomaly_122_init() and anomaly_122_uninit() procedures implement
proper activate and deactivate procedures which are required for
achieve low power consumption.
The real workaround for the anomaly is buried inside hal function
nrf_qspi_disable() is called indirectly by the anomaly_122_uninit().

Therefore anomaly_122_init/uninit should be called for any
nrf QSPI device.

This patch renames functions and make call to them mandatory.
This fixes increased power consumtion issue on nRF53 device when
qspi was used.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2022-05-27 15:23:12 -07:00
Georgij Cernysiov
e8dece902f drivers: flash: stm32_ospi: fix includes
Adds `zephyr/...` prefix to `toolchain.h` include.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-25 11:13:40 +09:00
Christoph Heller
382ee011d5 drivers: flash: stm32h7x: Fix wrong flash write offset
The flash_stm32_write_range() function of the STM32H7x flash
driver partially uses a wrong flash program word size for certain
SOC types when calculating the flash write offset. If the used
SOC is not having a flash program word size of 256 bits / 32 bytes
the written data might get corrupted, as the flash write offset
value does not match the number of bytes that were actually
written.

Fixes #45568

Signed-off-by: Christoph Heller <chris@metanetics.de>
2022-05-18 10:54:36 +02:00
Georgij Cernysiov
4f10178f3d drivers: flash: stm32: qspi: use ternary and asserts in quad prepare
Use ternary operation and asserts to reduce the footprint
and code size.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
c54e7d162a drivers: flash: stm32: qspi: remove flag_quad_io_en field
There is no need in the `flag_quad_io_en` field.
When QE enabling failed, then the driver `init` fails as well.

There is no way to use qspi in quad mode if qe is not enabled.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
a8e0699972 drivers: flash: stm32: qspi: always include gpio header
Always include gpio header.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
13af1ca9f1 drivers: flash: stm32: qspi: support SFDP quad enable requirements
Parses SFDP QER related DW15 to use as the source for QER.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
685f2098c4 drivers: flash: stm32: qspi: support DTS quad enable requirements
Adds support for DTS quad_enable_requirements property.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
706697168b drivers: flash: stm32: qspi: move prepare cmd is enable check
Moves IS_ENABLE check from prepare program and read to the caller.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
bbdfe6d9e0 drivers: flash: stm32: qspi: support 1-4-4 and 1-1-4 quad read modes
Adds support for 1-4-4 and 1-1-4 read modes.

SFDP is used to query for available read instructions, then the
fastest one is used.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
0216353263 drivers: flash: stm32: qspi: support DTS writeoc
Adds support for DTS writeoc.

Uses 1-4-4 mode by default (as the original driver).

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
4ef6b82681 drivers: flash: stm32: qspi: minor cleanup
Removes double line and log output regarding
device initialization.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
c2dfeb11c1 drivers: flash: jesd216: correct comment mistake
Corrects type name in the comment for the DW15 QER field.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
b43741cd5d drivers: flash: spi_nor: add SR3 read and write defines
Adds Status Register 3 read and write opcode defines.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
22c8022b54 drivers: falsh: spi_nor: add PP_1_1_4 and rename 4PP
* Renames 4PP define to PP_1_4_4
* Adds PP_1_1_4 define

That matches linux kernel defines a bit more.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Georgij Cernysiov
78ecf65267 drivers: flash: spi_nor: remove not used QE bit define
Removes unused QE bit define.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-13 08:44:54 -07:00
Francois Ramu
084dc3f0dd drivers: flash: ospi factorized for stm32 devices
Simplifies the driver and Gives a generic function to prepare the Regular
commands for each instruction.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-05-12 14:56:25 -05:00
Francois Ramu
16754378fb drivers: flash : introduce a new driver for the OCTOSPI
This is the stm32 octospi driver based on the exisitng quadspi
 for stm32 devices and source code from the STM32Cube.
This drivers initialized the peripheral and the NOR memory
in SPI or OctoSPI mode with STR or DTR data Transfer rates.
The NOR-flash can provide the SDFP table directly (if supported)
or through the DeviceTree.
 Limitation: no DMA transfer.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-05-12 14:56:25 -05:00
Francois Ramu
712d2537be drivers: flash: JESD216 ospi command for SFDP
Includes the 16bit command to read the SFDP in the NOR flash.
according to the JEDEC standard.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-05-12 14:56:25 -05:00
Francois Ramu
5b029377ab drivers: flash: spi nor header includes definition for OSPI commands
With the introduction of the OSPI NOR flash controller
more octal commands and parameters are defined.
It completes the existing SPI commands

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-05-12 14:56:25 -05:00
Gerard Marull-Paretas
fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Daniel DeGrasse
2551a75c9e boards: imx_rt: Don't default FLASH_MCUX_FLEXSPI_XIP to enabled
Do not default FLASH_MCUX_FLEXSPI_XIP to enabled when code is not
located in flash, this will cause issues if code is executing from ITCM,
as the zephyr_code_relocate macro will relocate the flash driver code
into itcm, and overwrite the zephyr image.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-04 10:46:03 -05:00
Daniel DeGrasse
e8f7181c50 drivers: flash_mcux_flexspi_mx25um51345g: move all device data to RAM
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-03 13:38:55 -05:00
Daniel DeGrasse
836f0f5ee5 drivers: flash_mcux_flexspi_hyperflash: move all device data to RAM
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-03 13:38:55 -05:00
Daniel DeGrasse
7aa883b5df drivers: flash_mcux_flexspi_nor: Move all device data to RAM
Move all device data to RAM. Since the flexspi driver accesses the
flash device that is being used for XIP, various RWW hazards can occur
if the flexspi driver is interacting with the flash device, while
running in XIP mode.

Fixes #45182

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-03 13:38:55 -05:00
Sylvio Alves
7022dcfd95 drivers: flash: esp32: add flash encryption support
Add flash encryption function check to redirect
flash write and read calls properly.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-02 10:30:24 -05:00
Sylvio Alves
6c6b688b91 driver: spi: esp32: update flash driver to use hal
This modification is required to enable flash encryption.
Using hal implementation of spi_flash calls maintains
compability amongs different socs while offering
latest esp-idf enhancements.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-02 10:30:24 -05:00
Thomas Altenbach
c5ebea590f drivers/flash: stm32h7: fix fault when cache disabled
Add a check to avoid invalidating the cache when the latter is disabled.
Indeed, doing so can lead to a bus fault.

Signed-off-by: Thomas Altenbach <taltenbach@witekio.com>
2022-04-21 13:05:08 +02:00
Francois Ramu
bf49a04dcf drivers: flash: stm32 definition of all registered bitfield
redefine all the stm32 flash register bit Name from
FLASH_NSCR_xxx to FLASH_STM32_FLASH_NSCR_xxx
in all the zephyr drivers.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-04-13 13:55:34 -07:00
Francois Ramu
623b0418b6 drivers: flash for the stm32l5x or stm32u5 serie with max 2MB
Adds the stm32u5 flash controller driver for this serie
to the existing stm32l5 flash driver part
Only 1 or 2 MB devices exist today (4MB is possible in the future).
This flash controller driver is adapted from the flash_stm32l5.c

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-04-13 13:55:34 -07:00
Francois Ramu
269adf5ca8 drivers: flash stm32 flash driver includes stm32u5 serie
This adds the stm32U5 soc family to the flash driver
The flash controller has particular register names in the Non-Secure
area to be adapted for the driver.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-04-13 13:55:34 -07:00
Dominik Ermel
92b299ff28 drivers/flash/flash_shell: Check for read error before verification
The cmd_write contains write verification that compares what has
been written with what it can read; the flash read operation
status was not checked which means that the bus or communication
problem was reported the same way as malformed write.
There have also been some optimization done by removal
of multiplications.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2022-04-12 10:05:40 -05:00
Dominik Ermel
35616d1e63 drivers/flash/flash_shell: Write buff size dependent on shell
The commit changes default buffer size for flash write operations
to be CONFIG_SHELL_ARGC_MAX dependent; there is no point to define
buffer longer than number of write bytes that will be extracted
from command line arguments.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2022-04-12 10:05:40 -05:00
Gerard Marull-Paretas
fa874db8a5 drivers: flash: shell: improve flash device choice
Store an optional reference to the zephyr,flash-controller choice. If
available and no user input is provided, it will be used as the default
flash device. If not available, error message will be more explicit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-31 13:55:10 +02:00
Zack Cornelius
790e2bdb02 drivers: nrf_qspi_nor: Add support for S2B1 QER
Add support for S2B1 quad-enable-requirements.
Add wrsr call for various QER modes

S2B1v6 mode tested with Winbond W25Q128JV series and pp4o and read4io
commands.

Signed-off-by: Zack Cornelius <zcornelius@securityesys.com>
2022-03-24 14:54:05 +01:00
Andrzej Puzdrowski
3fc7182555 drivers/flash/nrf_qspi_nor: add support for enter 4-byte addressing mode
Added basic support for enter 4-byte addressing command.
Patch  supports command 0xB7 (Enter 4-Byte Address Mode),
with or without preceding WREN.

Similar as for SPI-NOR the `enter-4byte-addr` property of
memory node is used or describing how to Enter 4-Byte Addressing
mode.
Worth to notice that along with that property the `address-size-32`
property is expected as it switch the driver to use 4-byte addressing
in operations.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2022-03-23 16:02:49 +01:00
Michał Barnaś
a1ab8da862 kconfig: fix dt_node_has_prop and add nodelabel functions
The Kconfig function "dt_node_has_prop" was using label as its
parameter, where other functions use either chosen or path.
The documentation says that the parameter is path, so this patch
makes the function as documentation says and as other functions
in the file.
The additional nodelabel functions were added as counterparts that
are using nodes labels instead of paths.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2022-03-23 13:25:21 +01:00