The boot report is used to pass information from IRONside to a CPU
being booted.
Integrate the boot report to the update service sample.
Signed-off-by: Håkon Amundsen <haakon.amundsen@nordicsemi.no>
Add an IPC service API for triggering updates of the Nordic IRONside SE
firmware using the IRONside call module.
Co-authored-by: Håkon Amundsen <haakon.amundsen@nordicsemi.no>
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Add an IPC service API for booting local domain cores.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Add a promptless symbol that can be selected by different drivers. It is
there to ensure that the corresponding library is not added to the build
unless it contains at least one source file.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
IRONside calls are remote procedure calls which comprise the runtime
interface of Nordic IRONside SE. They are realized using a simple IPC
mechanism.
A local domain (client) issues requests to the server by exchanging data
in shared memory, which is divided into evenly sized buffers. The client
selects a buffer, writes a request into it, and sends it to the server.
The server processes that request and writes a response into the same
buffer before returning it to the client.
This patch adds the initial client-side implementation on top of MBOX.
It features cache management and a blocking alloc/dispatch/release API
for synchronous, zero-copy transfers.
A new devicetree binding is added to support this implementation. It is
patterned after the `zephyr,ipc-*` bindings, where each node associates
a pair of mailboxes and a shared memory region.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
An option is added to allow vendor specific processing at
scmi_shmem_write_message() and scmi_shmem_read_message().
Additionally code has been added specific to NXP which has
some extended validation features.
Signed-off-by: Andre Heinemans <andre.heinemans@nxp.com>
Added more APIs for ARM SCMI clock management protocol.
- scmi_clock_rate_set
- scmi_clock_parent_get
- scmi_clock_parent_set
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The Drivers using Pinctrl should be turning Pinctrl on
this should not be the responsibility of the board. This
commit removes CONFIG_PINCTRL from the boards side for nxp boards.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This includes helper function for pin configuration
and a DT binding for the pinctrl DT node.
There's two important notes to be made regarding this
protocol:
* pinctrl drivers have no subsytem API to implement as opposed
to clock control drivers. Because of this (and the fact that
`pinctrl_configure_pins()` doesn't require a `struct device`
handle) the pinctrl driver consists only of a helper function,
which implements the `PINCTRL_CONFIGURE_PINS` command.
Additionally, the `scmi_protocol` structure is defined inside
the pinctrl helpers source file to avoid redundant code
(otherwise, each SCMI-based pinctrl driver would have to define
it its source file).
* each vendor may have their own set of pin propeties and DT
representations for them. Because of this, there can't be a
generic, SCMI-based pinctrl driver. As such, each vendor who
wants to use the SCMI support for pinctrl operations will have
to implement their pinctrl driver (which, to put it simply,
revolves around implemeting `pinctrl_configure_pins()`) and
make use of the pin configuration function introduced in this
commit. Moreover, this means that each vendor will have control
over the way their pin properties are encoded in the
`scmi_pinctrl_settings` structure.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This includes:
1) Source containing helper functions, each
implementing a command from the clock management
protocol.
2) A clock controller driver making use of said
helper functions and implementing the clock
subsystem API.
3) A DT binding for clock protocol node.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Introduce core support for ARM's SCMI (System Control and
Management Interface). This includes:
* shared memory (SHMEM) driver. This consists of a suite
of functions used to interact with the shared memory area.
* shared memory and doorbell-based transport layer driver.
Data is passed between platform and agent via shared
memory. Signaling is done using polling (PRE_KERNEL) and
doorbells (POST_KERNEL). This makes use of Zephyr MBOX API
(for signaling purposes) and the SHMEM driver (for polling
and data transfer).
* core driver - acts as glue between transport and protocol
layers. Provides synchronized access to transport layer
channels and channel assignment/initialization.
* infrastructure for creating SCMI protocols
This is based on ARM's SCMI Platform Design Document: DEN0056E.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
