drivers: firmware: nrf_ironside: add IRONside CPUCONF service
Add an IPC service API for booting local domain cores. Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no> Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
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4 changed files with 147 additions and 0 deletions
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@ -4,3 +4,5 @@
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zephyr_library()
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zephyr_library_sources_ifdef(CONFIG_NRF_IRONSIDE_CALL call.c)
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zephyr_library_sources_ifdef(CONFIG_NRF_IRONSIDE_CPUCONF_SERVICE cpuconf.c)
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@ -26,3 +26,15 @@ config NRF_IRONSIDE_CALL_INIT_PRIORITY
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but higher than the priority of any feature that selects NRF_IRONSIDE_CALL.
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endif # NRF_IRONSIDE_CALL
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menu "Nordic IRONside services"
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depends on SOC_NRF54H20_IRON
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config NRF_IRONSIDE_CPUCONF_SERVICE
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bool "IRONside CPUCONF service"
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depends on SOC_NRF54H20_CPUAPP
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select NRF_IRONSIDE_CALL
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help
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Service used to boot local domain cores.
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endmenu
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59
drivers/firmware/nrf_ironside/cpuconf.c
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59
drivers/firmware/nrf_ironside/cpuconf.c
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/firmware/nrf_ironside/call.h>
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#include <zephyr/drivers/firmware/nrf_ironside/cpuconf.h>
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#define CPU_PARAMS_CPU_OFFSET (0)
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#define CPU_PARAMS_CPU_MASK (0xF)
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#define CPU_PARAMS_WAIT_BIT BIT(4)
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int ironside_cpuconf(NRF_PROCESSORID_Type cpu, const void *vector_table, bool cpu_wait,
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const uint8_t *msg, size_t msg_size)
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{
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int err;
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struct ironside_call_buf *buf;
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uint8_t *buf_msg;
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if (msg_size > IRONSIDE_CPUCONF_SERVICE_MSG_MAX_SIZE) {
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return -IRONSIDE_CPUCONF_ERROR_MESSAGE_TOO_LARGE;
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}
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buf = ironside_call_alloc();
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buf->id = IRONSIDE_CALL_ID_CPUCONF_V0;
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buf->args[IRONSIDE_CPUCONF_SERVICE_CPU_PARAMS_IDX] =
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(((uint32_t)cpu << CPU_PARAMS_CPU_OFFSET) & CPU_PARAMS_CPU_MASK) |
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(cpu_wait ? CPU_PARAMS_WAIT_BIT : 0);
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buf->args[IRONSIDE_CPUCONF_SERVICE_VECTOR_TABLE_IDX] = (uint32_t)vector_table;
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buf_msg = (uint8_t *)&buf->args[IRONSIDE_CPUCONF_SERVICE_MSG_0];
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if (msg_size > 0) {
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memcpy(buf_msg, msg, msg_size);
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}
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if (msg_size < IRONSIDE_CPUCONF_SERVICE_MSG_MAX_SIZE) {
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memset(&buf_msg[msg_size], 0, IRONSIDE_CPUCONF_SERVICE_MSG_MAX_SIZE - msg_size);
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}
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ironside_call_dispatch(buf);
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if (buf->status == IRONSIDE_CALL_STATUS_RSP_SUCCESS) {
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err = buf->args[IRONSIDE_CPUCONF_SERVICE_RETCODE_IDX];
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} else {
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err = buf->status;
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}
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ironside_call_release(buf);
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return err;
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}
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74
include/zephyr/drivers/firmware/nrf_ironside/cpuconf.h
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include/zephyr/drivers/firmware/nrf_ironside/cpuconf.h
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ZEPHYR_DRIVERS_FIRMWARE_NRF_IRONSIDE_CPUCONF_H_
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#define ZEPHYR_INCLUDE_ZEPHYR_DRIVERS_FIRMWARE_NRF_IRONSIDE_CPUCONF_H_
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#include <stdbool.h>
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#include <stddef.h>
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#include <zephyr/drivers/firmware/nrf_ironside/call.h>
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#include <zephyr/toolchain/common.h>
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#include <nrf.h>
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/**
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* @name CPUCONF service error codes.
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* @{
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*/
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/** An invalid or unsupported processor ID was specified. */
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#define IRONSIDE_CPUCONF_ERROR_WRONG_CPU (1)
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/** The boot message is too large to fit in the buffer. */
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#define IRONSIDE_CPUCONF_ERROR_MESSAGE_TOO_LARGE (2)
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/**
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* @}
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*/
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#define IRONSIDE_CALL_ID_CPUCONF_V0 2
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enum {
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IRONSIDE_CPUCONF_SERVICE_CPU_PARAMS_IDX,
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IRONSIDE_CPUCONF_SERVICE_VECTOR_TABLE_IDX,
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IRONSIDE_CPUCONF_SERVICE_MSG_0,
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IRONSIDE_CPUCONF_SERVICE_MSG_1,
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IRONSIDE_CPUCONF_SERVICE_MSG_2,
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IRONSIDE_CPUCONF_SERVICE_MSG_3,
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/* The last enum value is reserved for the number of arguments */
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IRONSIDE_CPUCONF_NUM_ARGS
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};
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/* Maximum size of the CPUCONF message parameter. */
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#define IRONSIDE_CPUCONF_SERVICE_MSG_MAX_SIZE (4 * sizeof(uint32_t))
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/* IDX 0 is re-used by the error return code and the 'cpu' parameter. */
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#define IRONSIDE_CPUCONF_SERVICE_RETCODE_IDX 0
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BUILD_ASSERT(IRONSIDE_CPUCONF_NUM_ARGS <= NRF_IRONSIDE_CALL_NUM_ARGS);
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/**
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* @brief Boot a local domain CPU
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*
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* @param cpu The CPU to be booted
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* @param vector_table Pointer to the vector table used to boot the CPU.
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* @param cpu_wait When this is true, the CPU will WAIT even if the CPU has clock.
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* @param msg A message that can be placed in radiocore's boot report.
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* @param msg_size Size of the message in bytes.
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*
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* @note cpu_wait is only intended to be enabled for debug purposes
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* and it is only supported that a debugger resumes the CPU.
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*
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* @note the call always sends IRONSIDE_CPUCONF_SERVICE_MSG_MAX_SIZE message bytes.
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* If the given msg_size is less than that, the remaining bytes are set to zero.
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*
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* @retval 0 on success or if the CPU has already booted.
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* @retval Positive non-0 error status if reported by IRONside call.
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* @retval -IRONSIDE_CPUCONF_ERROR_WRONG_CPU if cpu is unrecognized
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* @retval -IRONSIDE_CPUCONF_ERROR_MESSAGE_TOO_LARGE if msg_size is greater than
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* IRONSIDE_CPUCONF_SERVICE_MSG_MAX_SIZE.
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*/
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int ironside_cpuconf(NRF_PROCESSORID_Type cpu, const void *vector_table, bool cpu_wait,
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const uint8_t *msg, size_t msg_size);
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#endif /* ZEPHYR_INCLUDE_ZEPHYR_DRIVERS_FIRMWARE_NRF_IRONSIDE_CPUCONF_H_ */
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