Commit graph

703 commits

Author SHA1 Message Date
Wenxi Xu
503df3e69e drivers: dma: stm32: add null callback checking
Fix the STM32 DMA driver did not check if the optional dma_callback was
set in dma_stm32_configure(). This could lead to a hard fault when an
interrupt occurs and the callback is NULL, even though the API allows
the callback to be omitted.

Fixes #97454
Signed-off-by: Wenxi Xu <xuwenxi0517@gmail.com>
2025-10-30 18:38:39 -04:00
Qingsong Gou
4bb1c676cc drivers: dma: sf32lb: fix dma compile error
Fix dma clock compile error

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-10-30 15:13:25 +02:00
Jérôme Pouiller
f3e72b094f drivers: dma: siwx91x: Fix DMA_ADDR_ADJ_NO_CHANGE w/ memory destination
GPDMA does not support DMA_ADDR_ADJ_NO_CHANGE with a memory buffer. This
feature is required fro the SPI driver. Hopefully, SPI driver is the only
user of this feature.

Therefore, this commit introduces a hack for SPI. When the user want to
ignore the Rx data (= when he pass a NULL pointer for the Rx buffer),
rather than overwriting the destination in a loop, we just disable the rx
DMA.

This introduce a limitation: since Rx DMA stop early, any following Rx
request will start earlier than expected. Therefore, this patch breaks
cases with interleaved Rx buffers. In other words, the NULL buffer must be
the last one.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-28 08:46:48 -07:00
Jérôme Pouiller
42eff40bdc drivers: dma: siwx91x: Fix DMA_ADDR_ADJ_NO_CHANGE w/ memory source
GPDMA does not support DMA_ADDR_ADJ_NO_CHANGE with a memory buffer. This
feature is required for the SPI driver. Hopefully, SPI driver is the only
user of this feature.

Therefore, this commit introduces a hack for SPI. When the user request an
Rx transaction, rather than copying content of mosi_overrun parameter, it
configures the DMA to fill the destination memory (with either 0s or 1s).
Obviously, this only works if mosi_overrun is 0x00 or 0xFF. Hopefully, none
will need any other value.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-28 08:46:48 -07:00
Jérôme Pouiller
b359d5d29b drivers: dma: siwx91x: Simplify variables naming
Since the single-linked list management is well localized, the variable
names can now be abbreviated a bit.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-28 08:46:48 -07:00
Jérôme Pouiller
2fa6e07eef drivers: dma: siwx91x: Simplify descriptors list creation
The management of the single-linked list was made in various places:
  - RSI_GPDMA_BuildDescriptors()
  - after sys_mem_blocks_alloc()
  - at the end of the loop

Centralize it at the end of the loop.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-28 08:46:48 -07:00
Axel Utech
cf5fc97b06 drivers: dma: stm32: enable isr only if needed
Improve the STM32 DMA driver to only enable transfer and half-transfer
interrupts if the interrupt handler has effects beside clearing the
isr flag. This improves system performance as unnecessary interrupts
are no longer raised by the hardware.

Signed-off-by: Axel Utech <utech@sofiha.de>
2025-10-24 11:35:03 +02:00
Jérôme Pouiller
fb0dd841ff drivers: dma: siwx91x: Check buffers alignments
GPDMA hardware block has some requirement regarding the buffers alignments.

Note the previous condition was too permissive. It ignored
source_burst_length during the check of the transaction size.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-23 16:01:37 -04:00
Jérôme Pouiller
7e90e45b7a drivers: dma: siwx91x: Fix log messages
LOG_*() macros automatically add \n at the end of the messages. Code
shouldn't add one.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-23 16:01:37 -04:00
Martin Hoff
83a052f190 driver: dma: dma_silabs_siwx91x_gpdma: Add pm support
This commit introduce power management in gpdma driver.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-10-23 17:57:14 +02:00
Hieu Nguyen
1f4979975d drivers: dma: Add DMA support for Renesas RZ/V2L, A3UL, T2M, N2L
Add DMA driver support for Renesas RZ/V2L, A3UL, T2M, N2L

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-10-23 08:00:49 +02:00
S Mohamed Fiaz
b5061da0e2 driver: dma: dma_silabs_siwx91x: Add pm policy state support for dma driver
This commit enables the pm policy state lock support
for the dma_silabs_siwx91x driver.

Signed-off-by: S Mohamed Fiaz <fiaz.mohamed@silabs.com>
2025-10-22 17:42:22 +02:00
Aksel Skauge Mellbye
440755bd9e soc: silabs: Move Kconfig symbols for HAL selection to HAL
The Kconfig symbols for selecting HAL content should be part
of the HAL module integration, not defined by the SoC. Split the
symbols between the Series 0/1 Gecko HAL and Series 2 SiSDK HAL
when moving them.

For now, the Series 0/1 HAL symbols retain their name, while new
names consistent with the symbols already defined in the module
integration layer are used for the Series 2 HAL.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-10-22 09:03:15 +02:00
Camille BAUD
5eb694e68a drivers: dma: Introduce BFLB DMA driver
Introduce BFLB's DMA.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-10-22 08:55:21 +02:00
Biwen Li
8e97541ce4 drivers: dma: mcux_edma: get irq number for multi level int
Get irq number when multi level intrerrupts is enabled.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-10-21 22:53:41 +03:00
Biwen Li
fa68798528 drivers: dma: mcux_edma: print SADDR, DADDR
- Print SADDR, DADDR for debugging.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-10-21 22:53:32 +03:00
Tony Han
30b4e678ca drivers: dma: sam: implement finite state machine for DMA channel
Add state machine for config/start/stop/resume/suspend for DMA channels.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 17:26:20 +03:00
Tony Han
a7f1b709d3 drivers: dma: sam: add DMA channel suspend and resume support
Add support for XDMA channel read write suspend and read write resume.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 17:26:20 +03:00
Tony Han
56bc90bd68 drivers: dma: sam: update to support sama7g5 XDMAC peripheral
Update the driver to support sama7g5 XDMAC peripheral.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 17:26:20 +03:00
Tony Han
cb8e055a4d drivers: dma: sam: support different num of channels for each instance
As the number of DMA channels could be different between DMA instances,
get the number from "XDMAC Global Type Register" and validate the
channel used.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 17:26:20 +03:00
Tony Han
bb69252ccf drivers: dma: sam: update to support multiple DMA instances
This update xdmac driver to support multiple DMA instancess.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 17:26:20 +03:00
Alain Volmat
bc8eb83c36 drivers: dma: stm32: avoid clear flags if hal_override on unexpected irq
In case of using HAL_OVERRIDE, avoid clearing the FIFO ERROR flag
before calling the HAL DMA IrqHandler so that the HAL DMA code
handling can be used.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-20 19:15:44 -04:00
Alain Volmat
110c61bfea drivers: dma: stm32: avoid clear TE in case of hal_override
If hal_override is set, avoid reporting an error and clear the
transfer error (TE) bit so that HAL code can properly handle it.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-20 19:15:44 -04:00
Declan Snyder
728eff4756 drivers: dma_mcux_edma: Support EDMAv3 without dmamux
Support EDMAv3 platform that do not have dmamux or always on capability.
Therefore, memory to memory transfer is limited in this environment.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Co-authored-by: Emilio Benavente <emilio.benavente@nxp.com>
2025-10-16 17:17:12 +03:00
Declan Snyder
d8dbd3fade drivers: mcux_edma: refactor configure func more
Split this function up even more

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-10-16 17:17:12 +03:00
Tom Burdick
6b350da5ec dma: Drop syscalls
DMA syscalls as they were implemented were unsafe. Accepting a void* was
never acceptable as many things could not be verified about it.
Accepting a channel identifier meant that a user mode thread could
start/stop any DMA channel which in theory could be owned by any other
driver. This shouldn't be possible.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2025-10-16 17:14:59 +03:00
Alain Volmat
e94495700f dma: stm32: removal of unused stm32_dma_config_channel_function
Function stm32_dma_config_channel_function is unused hence remove it
from headers and dma_stm32_v1. In case of dma_stm32_v1, the related
configuration is already part of the LL_DMA_Init call done in
another place in dma_stm32.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-02 09:31:36 +02:00
Alain Volmat
a09fc068ea dma: stm32: dma_stm32_slot_to_channel is only applicable on STM32Fx
The dma_stm32_slot_to_channel function is only applicable on the
STM32Fx series since the LL_DMA_CHANNEL_x macros only exist for those
platforms among the one based on st,stm32-dma-v1.
While checking for !defined(CONFIG_DMAMUX_STM32) is ok to enable this
on STM32Fx, it prevents to disable dmamux on other platforms since
required symbols do not exist.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-02 09:31:36 +02:00
Gerard Marull-Paretas
4b4dcbbf4a drivers: dma: sf32lb: add initial driver
Add an initial driver for SiFli SF32LB DMAC DMA controller.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2025-09-29 12:40:15 -04:00
Sai Santhosh Malae
ce923eb8fc drivers: dma: siwx91x: Add siwx91x GPDMA driver
Implement GPDMA driver for siwx91x device

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-09-22 13:26:52 -04:00
Biwen Li
16c03c4145 drivers: dma: mcux_edma: convert address
Convert address for dma when update tcd registers.
- This commit fixes a bug that dma reports source/destination bus errors
  when dma try to access the unconveted addresses. The unconverted
  addresses will be reserved address from dma view.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-09-19 17:47:44 -04:00
Tom Chang
76d54c1a37 drivers: dma: npcx: add gdma support
This commit adds support for the GDMA functionality.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-09-16 09:53:30 +02:00
Adrian Bonislawski
8658ce5c9e drivers: dma: dw: Add power management state check in get_status
Add power management state validation in dw_dma_get_status() to ensure
the device is in active state before attempting to read DMA status.
Returns -EINVAL if device is not active, preventing potential issues
when accessing hardware registers while device is suspended.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-09-15 19:46:07 -04:00
Khanh Nguyen
bc15acc0fa drivers: dma: add support for Renesas RA DMAC driver
Add support for the Renesas RA Direct Memory Access Controller,
including driver source files, Kconfig options, and DTS bindings.

- Add initial implementation of the RA DMAC driver
- Add dedicated Kconfig and CMake integration
- Provide Devicetree bindings for the RA DMAC
- Update module Kconfig to include the new driver

This enables DMA functionality on Renesas RA series MCUs.

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-09-12 14:23:37 -04:00
Julien Panis
051539e867 drivers: dma: cc23x0: Add power management
Add runtime PM support to cc23x0 DMA module.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-09-11 14:17:11 +01:00
Vit Stanicek
1c0ae3cc18 drivers: dma_mcux_lpc: Sanitise chan. data overrun
Add a num_of_allocated_channels field to struct dma_mcux_lpc_config. Add
a a capacity check for dma_X_channel_data_arr in dma_mcux_lpc_configure.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-09-04 14:42:27 +02:00
Benjamin Cabé
0132ea07fb doc: fix spelling errors tree-wide
fix some spelling errors in code comments and Kconfig helps

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-09-03 17:04:13 +02:00
Erwan Gouriou
db1d31e938 drivers: dma: stm32: Minor indentation fix
Makes it easier to grep.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-09-03 11:03:31 +02:00
Erwan Gouriou
b9577e6edb drivers: dma: stm32: Align channel offset handling in all API functions
To ease code understanding of offset handling within the driver,
harmonize its treatment within impacted functions.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-09-03 11:03:31 +02:00
Erwan Gouriou
5e4bf3780d drivers: dma: stm32u5: Clean up stream offset code
STM32_DMA_STREAM_OFFSET is defined as 0 in case "dma u5" is in use.
Clean up code relating to this define.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-09-03 11:03:31 +02:00
Kevin Wang
618b6b46a5 tests: drivers: dma: Update board config and overlay for adp_xc7k_ae350
1. Add config and overlay file in test scatter_gather for adp_xc7k_ae350
   and adp_xc7k_ae350_clic to support the test case.
2. Modify the config file in test chan_blen_transfer and loop_transfer
   because the tests do not support the NOCACHE memory configuration,
   the DCACHE configuration needs to be disabled.

Signed-off-by: Kevin Wang <kevinwang821020@google.com>
2025-08-21 15:58:35 +02:00
Kevin Wang
06bec271d9 drivers: dma: atcdmac300: Upgrade atcdmac driver to support series device
1. Upgrade the ATCDMAC driver to make it compatible with multiple
   ATCDMAC series drivers.
2. Rename the driver from ATCDMAC300 to ATCDMACX00.

Signed-off-by: Kevin Wang <kevinwang821020@google.com>
2025-08-21 15:58:35 +02:00
Mike J. Chen
d47353928c drivers: dma_mcux_lpc: fix missing peripheral case
Change 4e0e3c990d caused
a regression in that SPI_MCUX_FLEXCOMM_TX DMA
transfers weren't properly set to be a peripheral
transfer.

Signed-off-by: Mike J. Chen <mjchen@google.com>
2025-08-20 07:40:13 +02:00
Declan Snyder
0f66420cb2 drivers: mcux_edma: Fix dtcm desc kconfig dep
The syntax was wrong for the chosen dtcm node. Also fixing build error
on 1180 by re-allowing the symbol on some tests.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-08-20 07:39:54 +02:00
Fabrice DJIATSA
d48026b446 drivers: dma: stm32u5: update dma_suspend function
The previous 1ms sleep introduced unnecessary latency
while waiting for the SUSPF flag.
Switching to a 750µs busy-wait provides a more responsive
and precise delay,improving performance in time-sensitive contexts.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-08-18 11:58:08 +02:00
Declan Snyder
9278404021 dma_mcux_edma: Simplify mmap ifdefs
Halve all this ifdef code by making a macro function for the memory
mapping.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-08-14 22:38:08 -04:00
Declan Snyder
0dcc642886 dma_mcux_edma: Extract dmamux code to helpers
Extract and group dmamux related code together for readability.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-08-14 22:38:08 -04:00
Declan Snyder
071aa4cc29 dma_mcux_edma: Split configure function into helpers
There was actually three different types of configuration modes
happening here, and this function was getting extremely bulky and hard
to read due to the amount of nesting of conditionals. Split these into
separate functions and call them appropriately depending on the type of
transfer.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-08-14 22:38:08 -04:00
Declan Snyder
2379fac44f dma_mcux_edma: Split reload function into helpers
There is two completely different types of reload modes happening here,
therefore we should split this function into two completely separate
functions because it was getting large and hard to read. Removes
one level of indentation.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-08-14 22:38:08 -04:00
Declan Snyder
fcfbf247e1 dma_mcux_edma: Simplify max data size code
Instead of having preprocessor code, make a hidden kconfig
to indicate this and be smarter about the C code (these are all powers
of two)

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-08-14 22:38:08 -04:00