When using one of the internal channels (die_temp, vbat, vref) the
channels are enabled in the individual drivers and disabled again
whenever an adc conversion is complete.
This creates a race condition if the ADC is used from multiple threads.
This commit moves the disabling of the channels to the individual
drivers.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
Updated API version enables multi-instance GPIOTE driver.
Additionally obsolete symbol that was used to specify
API version in the past was removed.
Affected drivers have been adjusted and appropriate changes
in affected files have been made.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Turning on clock via clock controller and
resetting ADC device via reset controller on initializing.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Configure the sw trigger just after calibration
So the conversion can start on regular channel on the
software control bit.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds support for more STM32 CPUs that has
a different DMA interface. This was tested only for
the nucleo_l476rg.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Previously the STM32 DMA driver was dependent on a very specific
name for the DMA in the DTS. This hidden requirement has caused
a bit of confusion. This commit changes the driver to instead
always use the first DMA listed in the ADC node's dma property.
Should fix: #65387
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Do not enable subsystem/driver shell modules by default and stop abusing
CONFIG_SHELL_MINIMAL, which is internal to the shell subsystem, to decide
when to enable a driver shell.
The list of shell modules has grown considerably through the
years. Enabling CONFIG_SHELL for doing e.g. an interactive debug session
leads to a large number of shell modules also being enabled unless
explicitly disabled, which again leads to non-negligible increases in
RAM/ROM usage.
This commit attempts to establish a policy of subsystem/driver shell
modules being disabled by default, requiring the user/application to
explicitly enable only those needed.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Affected CONFIG_ADC_ADS114S0X_GPIO=y build.
register_addresses was wrong type for
ads114s0x_write_multiple_registers()
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Move the syscall_handler.h header, used internally only to a dedicated
internal folder that should not be used outside of Zephyr.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fix the data acquisition thread function signatures to avoid a stack
corruption on thread exit.
Fixes#62637
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Fix the problem not apply pinctrl eventhough the config is defined.
In practice, the setting is equals to soc default.
So, there is no apparent change in behavior.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
"const k_tid_t" is "struct k_thread * const" and not "const struct
k_thread *" as the code may be assuming. Just drop it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Replace Nuvoton NPCX series definitions with new Kconfig definitions in
the npcx drivers. The benefit of this approach is that we won't touch
the npcx driver sources again during introducing a new npcx series next
time.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The macro K_THREAD_STACK_MEMBER has actually been deprecated
since v2.4.0 in the macro doxygen description, but it was
never marked with __DEPRECATED_MACRO. Since this was being
used in various drivers, make it follow the deprecation
process.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
CONFIG_NOCACHE_MEMORY is a valid way of declaring buffers in
nocache regions. Consider them valid in the STM32 ADC driver
nocache check.
Copied from commit 818aa2d
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
For all STM32 ADC that use common sampling times, there is a check made to
ensure that all channels of a sequence use the same sampling time.
The value was not reset between reads, resulting in error if two
consecutive sequences used different values.
This commit adds a reset of this value once read is done.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove CHANNEL_COUNT limit used to check the channel bitmask.
This value was not applicable on STM32L1 where channel can go up to 31.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
On some STM32 families (such as F4), temperature and Vbat sensor share the
same ADC channel, which can lead to conflict when reading them, and wrong
measurement can follow.
To alleviate this problem, this commit moves the setting of the common
path internal channel to the sensor drivers themselves instead of doing
it in the ADC driver.
The teardown is still done in the ADC driver, systematically, instead of
channel by channel (which has the same result).
By moving this logic in the sensor drivers, the properties temp-channel,
vbat-channel and vref-channel becomes useless and are thus removed.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add phandle prop to reference any regulator that must
be enabled in order for the LPADC to function as intended.
Change LPADC driver to use this property if present.
LPADC on LPC55S36 depends on VREF peripheral, enable for this platform.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This is the final step in making the `zephyr,memory-attr` property
actually useful.
The problem with the current implementation is that `zephyr,memory-attr`
is an enum type, this is making very difficult to use that to actually
describe the memory capabilities. The solution proposed in this PR is to
use the `zephyr,memory-attr` property as an OR-ed bitmask of memory
attributes.
With the change proposed in this PR it is possible in the DeviceTree to
mark the memory regions with a bitmask of attributes by using the
`zephyr,memory-attr` property. This property and the related memory
region can then be retrieved at run-time by leveraging a provided helper
library or the usual DT helpers.
The set of general attributes that can be specified in the property are
defined and explained in
`include/zephyr/dt-bindings/memory-attr/memory-attr.h` (the list can be
extended when needed).
For example, to mark a memory region in the DeviceTree as volatile,
non-cacheable, out-of-order:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_VOLATILE |
DT_MEM_NON_CACHEABLE |
DT_MEM_OOO )>;
};
The `zephyr,memory-attr` property can also be used to set
architecture-specific custom attributes that can be interpreted at run
time. This is leveraged, among other things, to create MPU regions out
of DeviceTree defined memory regions on ARM, for example:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-region = "NOCACHE_REGION";
zephyr,memory-attr = <( DT_ARM_MPU(ATTR_MPU_RAM_NOCACHE) )>;
};
See `include/zephyr/dt-bindings/memory-attr/memory-attr-mpu.h` to see
how an architecture can define its own special memory attributes (in
this case ARM MPU).
The property can also be used to set custom software-specific
attributes. For example we can think of marking a memory region as
available to be used for memory allocation (not yet implemented):
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_NON_CACHEABLE |
DT_MEM_SW_ALLOCATABLE )>;
};
Or maybe we can leverage the property to specify some alignment
requirements for the region:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_CACHEABLE |
DT_MEM_SW_ALIGN(32) )>;
};
The conventional and recommended way to deal and manage with memory
regions marked with attributes is by using the provided `mem-attr`
helper library by enabling `CONFIG_MEM_ATTR` (or by using the usual DT
helpers).
When this option is enabled the list of memory regions and their
attributes are compiled in a user-accessible array and a set of
functions is made available that can be used to query, probe and act on
regions and attributes, see `include/zephyr/mem_mgmt/mem_attr.h`
Note that the `zephyr,memory-attr` property is only a descriptive
property of the capabilities of the associated memory region, but it
does not result in any actual setting for the memory to be set. The
user, code or subsystem willing to use this information to do some work
(for example creating an MPU region out of the property) must use either
the provided `mem-attr` library or the usual DeviceTree helpers to
perform the required work / setting.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add all available instances of the ADC series
MAX11102-MAX11117 to the ADC shell.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Remove `threshold-reg-offset` DT property and implement them with static
inline functions in `reg_def.h`
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add multi-device support in npcx adc driver since there is more than one
adc module in npcx4 series. And each adc's reference voltage might be
different, this CL introduces the `vref-mv` prop. to select its own
reference voltage.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Kate Yen <htyen@nuvoton.com>
Now that everything is in place, the prescaler value picked from dts is
used to properly configure the clock.
The code is moved into its own function.
There are four main cases:
- F1 and F37x don't have prescaler (in ADC register) so nothing is done.
- F0 only has individual registers.
- C0, G0, L0, WB1x and WL have both invidual and common registers. The
individual one is used to define either synchronous mode with its
prescaler, or asynchronous mode. The common one is only used to store
the value of the asynchronous prescaler.
- All others only have a common register where both the mode and the
prescaler is stored.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Get the STM32 ADC prescaler data from dts to create the appropriate LL
macro to use for the ADC clock.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This adds support for the max1125x (max11254, max11254)
family of spi adc devices.
Signed-off-by: Mustafa Abdullah Kus <mustafa.kus@sparsetechnology.com>
To allow the ADC API unit test to skip tests for non-implemented
features, return -ENOTSUP.
Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
