It was not possible to add directories under an SoC family
because of the direct call to Makefile in the SoC series from the
architecture level.
While we have SoC still using the old structure, add a conditional
to still support old structure and allow Makefiles directly under
an SoC family directory.
This is useful for adding drivers and BSP files common to one family.
Change-Id: I85dc8341523b41949de91d78675153ce0baa5aac
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
With most boards there's no simple way to get access to the HCI
traffic. Simultaneously these boards only have one external UART for
the console. This patch introduces a protocol which combines both
normal logs and HCI logs over a single binary protocol sent over the
console UART.
The protocol is modeled based on the btsnoop/monitor protocols used by
BlueZ, and the first tool that's able to decode this is btmon from
BlueZ ("btmon --tty <tty>").
For platforms with two or more external UARTs it is still possible to
use CONFIG_UART_CONSOLE as long as the UART devices used are
different, however on platforms with a single external UART
UART_CONSOLE should be disabled if BLUETOOTH_DEBUG_MONITOR is enabled
(in this case printk/printf get encoded to the monitor protocol).
Origin: Original
Change-Id: I9d3997c7a06fe48e7decb212b2ac9bd8b8f9b74c
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use SOC_FAMILY and SOC_SERIES to identify soc families and series
and to point to the correct linker files and files related to a
specific SoC.
Change-Id: I8b1a7339f37d6ea4161d03073d36557a40c0b4a6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add additional layers when defining SoCs to allow reuse among SoCs
of the same family and architecture.
The Board is the first location where we search for a linker.cmd file,
if not found we look for the linker file in
arch/<arch>/soc/<family>/<series>
Change-Id: I51d5e9a056220d0bd2ae0fa31474ffe63568e698
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use SoC family/series and reoganise the structure to follow new
hierarchy.
Change-Id: I8637f1487a8287a6614ce6636cd018cf342fec95
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.
Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.
Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.
Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
GDB server needs ownership of some exceptions to display information when
taking a fatal exception (DIVIDE_ERROR, PAGE_FAULT).
Introduce a Kconfig option that can work for any debugger.
Change-Id: I39aef22a820543a7fe9ac333b487592946abc0f3
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The GDB server implements a set of GDB commands, such as read/write
memory, read/write registers, connect/detach, breakpoints, single-step,
continue. It is not OS-aware, and thus provides a 'system-level'
debugging environment, where the system stops when debugging (such as
handling a breakpoint or single-stepping).
It currently only works over a serial line, taking over the
uart_console. If target code prints over the console, the GDB server
intecepts them and does not send the characters directly over the serial
line, but rather wraps them in a packet handled by the GDB client.
Change-Id: Ic4b82e81b5a575831c01af7b476767234fbf74f7
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Introduce an x86 interrupt stack frame that contains more information
than the non-debug one, namely the caller-saved GPRs, as well as an API
to retrieve it. Able to handle nested interrupts stack frames.
Change-Id: If182aaa2f34e4714b16ca65ff79da63b72d962f7
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Allow a debug server such a GDB to take control when a fatal error
occurs. The debug server simply has to define a _debug_fatal_hook()
function that will override the weak function installed by default.
Change-Id: Ib9dca5755868f747b697fa3178e09109f1eedb07
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Quark flash sub-driver. It is based on the QMSI driver.
In order to enable this driver, the following options
must be set.
CONFIG_QMSI_DRIVERS
CONFIG_QMSI_INSTALL_PATH
CONFIG_FLASH
CONFIG_SOC_FLASH_QMSI
Origin: Original
Change-Id: Iffbea3b17624c755e367677b76d7216c2fba2ca1
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
The D2000 CRB is similar to the Arduino 101 (at least as GPIO is
concerned). Add support for using the GPIO controller without QMSI
libraries.
Change-Id: I001da05c9a9d5771b2ec678a9d4a91c44db05289
Signed-off-by: Vlad Dogaru <vlad.dogaru@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib483419be5199b52cf281b4b106cd8a3be95b7be
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove UART default configuration to make it default UART_0. This
makes default working fine with Nordic BLE chip using H:4 driver.
Change-Id: Icb6d9f068b586bbf04694bc77ed968211de94c8a
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Allow to connect Nordic Devkit or dongle to qemu. Simple
configuration for the current NBLE firmware is following:
Connect Nordic board to PC, ttyACMX gets created.
$ socat -x /dev/ttyACMX,raw,b1000000 unix-listen:/tmp/bt-server-bredr
Build app with prj_nble.conf and run with make qemu
Change-Id: I354644b465ad09ab0ca62fbd97f15d9bb3c87d6a
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib7e0b81b2df1a0225fc244fea3035416d0a4f282
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
This also separates IRQ_PRI into one for DW and one
for QMSI, to follow the convention of every other
drivers.
Change-Id: I338f819f71c18fa9e17015e8a588a3d0207350c6
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ic73783189db57059d2b7f3727e4802e1b2e27931
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ifd65097a65f80539cac073f95aadc2d8e42efb9f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ifdbb5e3a997795ef577350d88f8cb06877eb6463
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib8158f00a6c6616360ddbcf63981f1a85911c1b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
GCC enables unaligned memory access for ARMv6 and above.
Once unaligned memory access is allowed, there's no need
for the unaligned memory access trap.
The change prevents the situation when the compiler
generates code that uses unaligned memory access, but
the CPU generates an exception when this code runs.
Change-Id: Id33f2264c631772e5c561e76fb579d8b7bc26e1e
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
This patch extends the i2c shim driver so it supports the 'default
configuration' infrastructure which enables the user to specify a
default configuration for the I2C device. The default configuration
is set during driver initialization.
This patch also changes Quark SE and D2000 Kconfig.defconfig files so
the i2c default configuration is set to '0x12' which means standard
bus speed, 7-bit addressing and master mode. This is the same value
used when DW driver is selected, by the way.
Change-Id: I06e0dc3c29e8da2f3317db5bef285177f2e92c9a
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Remove those kconfig options that are SoC specific, and should not be
configurable via kconfig.
Change-Id: Ia62888838877da4627419bd36c261d5254761acd
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
It wasn't correct to add the size of the long jump instruction
as it *replaces* a short jump instead of just being after it.
So redefine this to be the difference in size between these
two instructions.
Change-Id: I65be2afab19d9cd8b096551acde0156f0503df87
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
These interrupt settings are SOC specific. So, move them to the
SOC level of Kconfig.
As IRQ priority is fixed in D2000, changed the value to 0 to
make it consistent with what other shim drivers are using.
Change-Id: Id20bed46c478a7555ae976e3a3063ba2cb099788
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
This is hardware design so there is no need for it to be
configurable in kconfig.
Change-Id: Iff162f330aae8ef9a7139b6e7ed9bfa87f26189a
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There is no need to re-define CONFIG_UART_CONSOLE_ON_DEV_NAME to be
"UART_0" all over the place as its default is "UART_0" already.
So remove those duplicate defaults.
Change-Id: Ia86e26b8f90540fdbd7dcb3358d6dac352648b21
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The IRQ triggering condition should be specified by SoC as it is
a decision for hardware design. This should not be configurable
in kconfig.
The default is to be triggered on rising edge, just as the same
old kconfig did.
Change-Id: If59d88a30711eb8e03d9cc4f409055cefe1995c5
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Moves those kconfig options which should be declared in
SoC or board header files instead. These are the one
that are tied to SoC or board and there is no need
for them to be configurable in kconfig.
Change-Id: I243d634f1a4a11dc8dc3530d95f93371015492b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
lp_count register can be store directly to memory, it is actualy done,
and the instruction that precedes it has no effect.
Change-Id: I8b8fee6abd6f08eea38dd1ab5bbe61c25a2a1f7d
Signed-off-by: Alexandre d'Alton <alexandre.dalton@intel.com>
ARC CPU has stack checking feature that allows to trigger an exception
whenever the stack is incorrectly accessed.
This patch implements the stack_top and stack_base register updates on
context switches, and activates the Stack Checking bit of STATUS32
register when the CPU is in the context of a fiber or task.
As GCC accesses the non-yet allocated stack with frame pointer enabled,
this patch also add the omit-frame-pointer gcc flag in order to work
properly.
Change-Id: Ia9e224085a03bd29d682fb8f51f8e712f2ccb556
Signed-off-by: Alexandre d'Alton <alexandre.dalton@intel.com>
The base addresses are SoC specific so there is no need to make
configurable via kconfig.
Change-Id: Iaf8444f77513255d5f0112af6710243aae09f066
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Most of the #ifdef are not really needed, so clean up the file
for readability.
Change-Id: I4d15f3cb7ef4db9113d4cdadbd3309da6587c64e
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is to standardize the kconfig for specifying IRQ priority.
Change-Id: Iab10655c6fc6f17c0c6dd49cb7a4e74fabcf852c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is to standardize the kconfig for specifying IRQ priority.
Change-Id: I3a51b35e633dc7b1b841e9fa504bf0cfc0d4d575
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.
The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.
This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.
Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.
Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.
Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The base address, IRQ line, chip select numbers, and clock
gating constants are static per SoC, so there is no need to
make them configurable in Kconfig.
Change-Id: I9f87ca29c28c38c42d4e4f1a3a41fa231f63ef03
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The base address and IRQ line are static per SoC, so there is no need
to make them configurable in Kconfig.
Change-Id: Ib78401ff136c29642356f5bda9d6cd3e5c98bece
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The UART port base address, IRQ line and clock frequency are static
per SoC, so there is no need to make them configurable in Kconfig.
Change-Id: Ia252958d205e0100d1b92e2a12d4c22411bc94b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The UART port base address, IRQ line and clock frequency are static
per SoC, so there is no need to make them configurable in Kconfig.
Change-Id: I79b142414143bc5ef585d3136a00375233de1723
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.
Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
