Commit graph

929 commits

Author SHA1 Message Date
Tomasz Bursztyka
61ef30d10e drivers/uart: Use dts to set uart options for ns16550 driver
Fix the ns16550 uart driver and relevant SoCs accordingly.
All generic settings are now DTS based.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka
17c6456678 drivers/uart: Use dts to set uart priorities for QMSI driver
Fix the qmsi uart driver and relevant SoCs accordingly.
Also: using config for irq everwhere relevantly and not an hardcoded
value in the driver.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Tomasz Bursztyka
250c4a87ed arch: Use dts to set rtc priorities for Intel quark, x86 and arc
Get the name generated through dts as well.
Fix the rtc driver and relevant SoCs accordingly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Adithya Baglody
5ab3960c75 arch: Cmake: Add __ZEPHYR_SUPERVISOR__ macro for arch files.
Normally a syscall would check the current privilege level and then
decide to go to _impl_<syscall> directly or go through a
_handler_<syscall>.
__ZEPHYR_SUPERVISOR__ is a compiler optimization flag which will
make all the system calls from the arch files directly link
to the _impl_<syscall>. Thereby reducing the overhead of checking the
privileges.

In the previous implementation all the source files would be compiled
by zephyr_source() rule. This means that zephyr_* is a catchall CMake
library for source files that can be built purely with the include
paths, defines, and other compiler flags that all zephyr source
files uses. This states that adding one extra compiler flag for only
one complete directory would fail.
This limitation can be overcome by using zephyr_libray* APIs. This
creates a library for the required directories and it also supports
directory level properties.
Hence we use zephyr_library* to create a new library with
macro _ZEPHYR_SUPERVISOR_ for the optimization.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-05-15 17:48:18 +03:00
Wayne Ren
c13b12eb49 arch: arc: explictly list all def config
it seems regular expresssion is not supported in "source xxx" after
latest changes in build system.

So explictly list all def config

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-15 09:48:11 +02:00
Wayne Ren
5eb5bb7df8 arch: arc: add the missing SPI_DW_SPI_CLOCK in dts.fixup
* the SPI share the same clk source with uart

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-15 09:48:11 +02:00
Wayne Ren
47d3a90dca arch: arc: reuse GCC_M_CPU in cmake file and remove unused comments
* reuse GCC_M_CPU in cmake file
* remove unused comments in linker.ld

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-15 09:48:11 +02:00
Wayne Ren
532e4d22ee dts: optimize and bug fixes the dts of em_starterkit
* add gpio, i2c, spi definitions
* optimize and bug fix the dts.fixup
* optimize and bug fix the em_starterkit related definitions
  in dts folder

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-15 09:48:11 +02:00
Wayne Ren
6307b8b97d arch: arc: refactor the soc part of em_starterkit
The original em7d, em9d and em11d are different configurations of
em_starterkit. They have the same peripherals, e.g. uart, spi, gpio
, ddr. The differences of them are in arc core configurations, interrupt
number assignment.

So em7d, em9d and em11d can be viewed in the same SoC family or SoC
series.

Referring other arch's implementation, this commit merges em7d, em9d
and em11d into the same SoC, named snps_emsk. This will eliminate
unnecessary duplication and make it easier for future maintainment.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-15 09:48:11 +02:00
Ulf Magnusson
547ed9b563 kconfig: Make 'source' non-globbing and use 'gsource'
Until now, Zephyr has used a patched Kconfiglib that turns 'source' into
a globbing source (by replacing 'source' with 'gsource' at the token
level). There's two problems with this:

  - The patch needs to be maintained separately

  - Misspelled filenames are silently ignored, as they look like glob
    patterns that don't match anything

Fix it as follows:

  1. Replace all 'source' statements that use wildcards with 'gsource'

  2. Remove the custom Kconfiglib patch so that 'source' no longer globs

The sed pattern '/source.*[*?]/s/source/gsource/' was run over all
Kconfig* files to do the replacement.

source's that use environment variables that might contain glob patterns
were manually changed to gsource.

Building the docs in doc/ is a good test, as doc/Makefile deliberately
sets the environment variables to glob up as many Kconfig files as
possible.

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
2018-05-08 11:14:12 +02:00
Wayne Ren
6c65ac2bb4 arch: arc: fix the typo of label which caused issue #7249
* fix the issue #7249 which is caused by a typo of label

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-02 09:31:00 -04:00
Wayne Ren
adf6f48e0d arch: arc: add the support of STACK_SENTINEL
* call the _check_stack_sentinel in unnested isr
return.

* for firq, _check_stack_sentinel is called in kernel
  isr stack because the limitation of banked register

* for normal irq, _check_stak_sentinel is called in
  the interruptted thread stack

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-04-17 10:50:12 -07:00
Wayne Ren
8da51ee326 arch: arc: optimize the _SysFatalErrorHandler
* For STACK_CANERY, the processor should not hang
* as _SysFatalErrorHandler is always executed in
  isr context, so remove k_is_in_isr
* the function should return after k_thread_abort

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-04-17 10:50:12 -07:00
Wayne Ren
24acf2a414 arch: arc: bug fixes in irq_load
remove magic numer, use IRQ_OFFLOAD macro

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-04-17 10:50:12 -07:00
Wayne Ren
3d9ba10b5c arch: arc: bug fixes and optimization in exception handling
The original exception handling has space to optimize and
and some bugs need to be fixed.

* define NANO_ESF
   * add the definition of NANO_ESF which is an irq_stack_frame
   * add the corresponding codes in exception entry and handler
   * remove _default_esf
* implement the _ARCH_EXCEPT
   * use trap exception to raise exception by kernel
   * add corresponding trap exception entry
   * add _do_kernel_oops to handle the exception raised by
     _ARCH_EXCEPT.
* add the thread context switch in exception return
   * case: kernel oops may raise thread context switch
   * case: some tests will re-implement SysFatalHandler to raise
     thread context switch.
   * as the exception and isr are handled in kernel isr stack, so
     the thread context switch must be in the return of exception/isr
     , and the exception handler must return, should not be decorated
     with FUNC_NORETURN
* for arc, _is_in_isr should consider the case of exception

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-04-17 10:50:12 -07:00
Tomasz Bursztyka
4652f59d64 arch/quark_se_c1000_ss: Switch to SPI DW driver
As QMSI driver does not support new SPI API.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-04-04 19:02:35 +02:00
Kumar Gala
8a824356e0 arch: arc: em{7,9,11}d: Add initial DTS UART support
Add support for getting some basic params from the DTS for the UART.
The ns16550 driver still needs to be updated to get IRQ and address
info from DTS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-23 10:13:53 +01:00
Kumar Gala
311e6b9e3e arch: arc: Use DTS for all ARC SoCs
Now that all ARC SoCs we can remove code associated with !HAS_DTS and
select HAS_DTS at the architecture level.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-23 10:13:53 +01:00
Kumar Gala
60ec8be309 arch: em{7,9,11}d: Add dts support
Add initial device tree support for the em{7,9,11}d SoC and associated
em_starterkit boards.  The device tree at this point specifies cpu core,
memory, interrupt controller, uart's and i2c controllers.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-23 10:13:53 +01:00
Tomasz Bursztyka
74d1835505 drivers/i2c: Make QMSI SS driver IRQs set via CONFIG_ options
Now that dts i2 qmsi ss nodes generate the right options, let's use
them. Apply the relevant fixup on the targeted SoC.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka
7af98f5e67 drivers/i2c: Use standard bitrate settings for QMSI SS driver
Apply the change on relevant arch/boards.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka
9b77741d63 drivers/i2c: Use standard bitrate settings for QMSI driver
Apply the change on relevant arch/boards.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka
9ddd8d1e4d arch/x86: Enable i2c through DTS for quark_se SS
And adapt relevant boards accordingly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Tomasz Bursztyka
6d247b5c2b drivers/i2c: Rename generic configure option in DW drivers
And adapt SoC's information relevantly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-23 10:42:33 +08:00
Kumar Gala
0ecd77e435 arch: arc: quark_se_c1000_ss: Fix DCCM_SIZE
The DCCM_SIZE is defined in terms of K, not bytes, so we need to adjust
it from bytes (generated from dts) to K (used by e CONFIG_DCCM_SIZE).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-15 08:14:27 -05:00
Wayne Ren
2c577ff90e arch: arc: fix the bug of context switch in interrupt
* the bug comes out when a context switch happens in interrupt
* the bug only affects the em7d in emsk 2.3
* the bug is caused by
  * wrong operations of stack
  * wrong setting of SEC_STAT's IRM bit

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-03-08 11:01:11 +01:00
Wayne Ren
6612c9f683 arch: arc: bug fixes in arc mpu driver
fix the bug in _is_in_region
* RDB0 -> RDP0

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-03-08 11:01:11 +01:00
Kumar Gala
6becb64dfc dts: quark_se_c1000_ss: Refactor dts.fixup into arch/arc/soc
Move common SoC dts.fixup defines into
arch/arc/soc/quark_se_c1000_ss/dts.fixup so we remove duplication in the
boards and only have board specific defines in
boards/arc/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-26 10:55:36 -06:00
Wayne Ren
bb50a88045 arch: arc: apply the new thread stack layout
The new thread stack layout is as follow:

|---------------------|
|  user stack         |
|---------------------|
| stack guard (opt.)  |
|---------------------|
|  privilege stack    |
-----------------------

For MPUv2
  * user stack is aligned to the power of 2 of user stack size
  * the stack guard is 2048 bytes
  * the default size of privileg stack is 256 bytes.
  For user thread, the following MPU regions are needded
    * one region for user stack, no need of stack guard for user stack
    * one region for stack guard when stack guard is enbaled
    * regions for memory domain.
  For kernel thread, the stack guard region will be at the top, adn
  The user stack and privilege stack will be merged.

MPUv3 is the same as V2's layout, except no need of power of 2
alignment.

* reimplement the user mode enter function. Now it's possible for
kernel thread to drop privileg to user thread.

* add a separate entry for user thread

* bug fixes in the cleanup of regs when go to user mode

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
e445ab6f21 arch: arc: handle exception in privilege task when USERSPACE enabled
when USERSPACE is enabled, exception is handled in the privilege
stack of thread. This make thread context switch is possible in the
exception handler. For some case,e.g. tests, this is useful.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
4433f81b47 arch: arc: MPUv2 enables MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
enable MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT for ARC MPU v2

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
0a71b106d1 arch: arc: save user thread's context into privilege stack
disable the U bit of irq.ctrl, so the user thread's context will
be saved into privilege stack when interrupts/exception come.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
a970b5fd32 arch: arc: scrub regs of kernel context before returning to userspace
scrub all the regs of kernel context before returnning to userspace.
For sys call, ro is not cleared as it's a return value of sys call.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
7ef2506611 arch: arc: enable US bit to check user mode
Enable us bit to check user mode more efficienly.

US is read as zero in user mode. This will allow use mode sleep
instructions, and it enables a form of denial-of-service attack
by putting the processor in sleep mode, but since interrupt
level/mask can't be set from user space that's not worse than
executing a loop without yielding.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
8feca6c2ef arch: arc: modify the kconfig for mpu case
* user space support requires THREAD_INFO
* for MPU version 2, the stack align is at least 2048 bytes
  * the smallest mpu region is 2048 bytes
  * the region size must bt power of 2
  * the start address of region must be aligned to the region size

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
e91733c78b arch: arc: bug fixes and add user space support in secure mode
* bug fixes
* add user space support in secure mode

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
f81dee0b2b arch: arc: add user space support for arc
* add the implementation of syscall
  * based on 'trap_s' intruction, id = 3
* add the privilege stack
  * the privilege stack is allocted with thread stack
  * for the kernel thread, the privilege stack is also a
    part of thread stack, the start of stack can be configured
    as stack guard
  * for the user thread, no stack guard, when the user stack is
    overflow, it will fall into kernel memory area which requires
    kernel privilege, privilege violation will be raised
* modify the linker template and add MPU_ADDR_ALIGN
* add user space corresponding codes in mpu
* the user sp aux reg will be part of thread context
* When user thread is interruptted for the 1st time, the context is
  saved in user stack (U bit of IRQ_CTLR is set to 1). When nest
  interrupt comes, the context is saved in thread's privilege stack
* the arc_mpu_regions.c is moved to board folder, as it's board
  specific
* the above codes have been tested through tests/kernel/mem_protect/
  userspace for MPU version 2

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Ramakrishna Pallala
301acb8e1b kernel: include: rename nano_internal.h to kernel_internal.h
Rename the nano_internal.h to kernel_internal.h and modify the
header file name accordingly wherever it is used.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-01-31 10:07:21 -06:00
Wayne Ren
5ca2c05316 arch: arc: Add _arch_mem_domain_configure
add the _arch_mem_domain_configure api to match the PR #5065 to avoid
compile failure in the future

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-01-18 11:50:59 -08:00
Wayne Ren
9a40bf6b7e arch: arc: Add the intial support of memory domain
Refering the ARM's implementation, the initial support of memory
domain in ARC is added:
* changes in MPU drivers
* changes in Kconfig
* codes to configure memory domain during thread swap
* changes in linker script template
* memory domain related macro definitions

the commited codes are simply tested through
samples/mpu/mem_domain_apis_test.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-01-18 11:50:59 -08:00
David B. Kinder
fd04de2d10 doc: fix misspellings in Kconfig files
periodic scan for typos missed during normal reviews

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-01-12 20:58:56 -05:00
Anas Nashif
9f6c7838e5 arch: fix typo defafult -> default
Simple typo fix.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-01-08 08:08:45 -05:00
Anas Nashif
7ae749828f kconfig: fix help text indentation
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-01-08 08:08:45 -05:00
Anas Nashif
5146dbbc58 arch: architecture defines kernel entry
Make defining the kernel entry architecture specific and move it to the
architecture domain.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-27 14:16:08 -05:00
Anas Nashif
429c2a4d9d kconfig: fix help syntax and add spaces
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 17:43:28 -06:00
Wayne Ren
5f349a4d4d arch: arc: fix the comments and coding style
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-12-13 12:05:33 -05:00
Wayne Ren
cdfb59a276 arch: arc: add the support of MPU version 3
MPU version 3 is included in em7d of em_starterkit 2.3.

The differences of MPU version 3 and version 2 are:

* different aux reg interface
* The address alignment requirement is 32 bytes
* supports secure mode
* supports SID (option)
* does not support memory region overlap

This commit adds the support MPU version 3 and also make some changes to
MPU version 2 to have an unified interface.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-12-13 12:05:33 -05:00
Wayne Ren
0892cd7f46 board: arc: em_starterkit: Add em7d support of em_starterkit 2.3
* em7d of em_starterkit 2.3 supports secure mode. add the support
  in kconfig and build system.

* change the default configuration of em_starterkit 2.3 to em7d

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-12-13 12:05:33 -05:00
Wayne Ren
528c960ae7 arch: arc: Add the support of secure mode for em
In ARC's SecureShield, a new secure mode (currently only em) is added.
The secure/normal mode is orthogonal to kernel/user mode. The
differences between secure mode and normal mode are following:

* different irq stack frame. so need to change the definition of
  _irq_stack_frame, assembly code.

* new aux regs, e.g, secure status(SEC_STAT), secure vector base
  (VECT_BASE_S)

* interrupts and exceptions, secure mode has its own vector base;
  interrupt can be configured as secure or normal through the
  interrupt priority aux reg.

* secure timers. Two secure timers (secure timer 0 and timer 1) are
  added.Here, for simplicity and backwards compatibility original
  internal timers (timer 0 and timer1) are used as sys clock of zephyr

* on reset, the processor is in secure mode and secure vector base is
  used.

Note: the mix of secure and normal mode is not supported, i.e. it's
assumed that the processor is always in secure mode.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-12-13 12:05:33 -05:00
Wayne Ren
52e4c197f3 arch: arc: Add FIRQ option
Add FIRQ option and change the _isr_wrapper. Currently, firq is
enabled by default, but in some arc configuration, firq can be
disabled.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-12-13 12:05:33 -05:00