With MVIC these can't be arbitrarily assigned and the vector must be
<irq num> + 0x20.
The correct number of vectors is now set for footprint-min on D2000.
Change-Id: Ibf59921dbc438c7465b7050dd74d0badc9a91fc3
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Uses the "trap_s" exception to simulate entry into IRQ context;
offloaded functions run on the FIRQ stack.
Change-Id: I310ce42b45aca5dabd1d27e486645d23fa0b118f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This way, it does not fall in the middle of a group, like the RAM group
and as a side-effect potentially move the dot (current address pointer).
Change-Id: Iefbff8bbeadfc740dee61154d7db99b7b7aad6d6
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The linker scripts for the quark_se_ss and generic_arc platforms are the
exact same, so extract the contents in an includable file.
Change-Id: I2cb90a6f819b12db77880228e41ff14c9755d59a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Initialization level can be one of five predefined.
Init priority is numeric from 1 to 99. If init level or priority
is defined wrong, linker prints out the message and stops.
Change-Id: I165a32ffb668cda983fd48eb2aa7b94998e31a18
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Do not depend on environment variables and use a kconfig variable
for defining the architecture.
In addition, remove the X86_32 variable, it just duplicates X86 for
not good reason, at least until start supporting MCUs with 64bit.
Change-Id: Ia001db81ed007e6a43f34506fed9be1345b88a4b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
These should now work for drivers written for other arches.
Still a hack to do all the IRQ setup at runtime.
Change-Id: I9717f74abef3b9934f9a1c0acbd76d960ed7a3cb
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The new flags parameter needs some documentation.
Change-Id: I24dc9df62323957bb4b294adf27487df3f76ea01
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Was exposed when building with clang. No need for a second const.
Change-Id: Ie97f6a4756aff62ce969e3eb786593f2fc175a56
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Flags allow passing IRQ triggering option for x86 architecture.
Each platform defines flags for a particular device and then
device driver uses them when registers the interrupt handler.
The change in API means that device drivers and sample
applications need to use the new API.
IRQ triggering configuration is now handled by device drivers
by using flags passed to interrupt registering API:
IRQ_CONNECT_STATIC() or irq_connect()
Change-Id: Ibc4312ea2b4032a2efc5b913c6389f780a2a11d1
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
I/O ports are not memory and thus such asm instruction cannot follow
such constraint. Plus, usual BT* instruction can be used on normal
registers.
Change-Id: Ie3aad668173962a0a90e7cb11231c7843836d412
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Let the compiler decide about the registers to use, depending on which
functions those are called from (as they might be already in use or
not).
Change-Id: I00afa0f82c740c8ea70133d85ab67e9cb117187d
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Remove prototype support for C++ constructors, since it is not well
designed. Device drivers (or other application code) that requires an
automatic initialization capability should use the device initialization
macros instead.
Note: Support for C++ constructors may be re-introduced at a later date.
However, a number of issues need to be settled, such as when the
constructors are invoked and what context they run in. (Running them
during nanokernel initialization, as was previously done, is probably
not the right approach.)
Change-Id: If6d27ac16b485cb39d5ec34084e9d0f1991074f4
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Since commit 3d7b21b69e the 'priority' parameter is used by the macro
IRQ_CONNECT_STATIC. This patch fixes the macro documentation which
says it is ignored.
Change-Id: I56eec49466a33441fa1822af78956ebb7f5c24ce
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
As the system always operates in ring 0, neither the SS nor ESP registers
are pushed onto the stack when an exception or an interrupt occurs.
However, as the ESP field is still relevant to debugging fatal errors, a
place has been carved for it in the NANO_ESF.
Change-Id: Ibb2578c69fa6365fd6e9dbf7b51f461063dadc68
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
As page fault exceptions can not occur in the system as it is currently
designed, there is no need to track the CR2 register as part of the
exception stack frame.
Change-Id: I75d7a74c5d2c6efcc0e9141d2662861bc2052629
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Implementation of the sys_arch_reboot() call for galileo, using the
RST_CNT register (I/O port 0xcf9).
Change-Id: I00fbf4aaaf746f640674da6880e1d6c5aa230e06
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
It can be used by some subsystems even in a microkernel.
Change-Id: I07241aab94ecf67c94dce2d05f2cd774b2a6b044
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
These symbols have more meaningful names when trying to figure out where
the ROM/RAM starts/ends, rather than relying on e.g. __data_rom_start for
the end of the ROM (__data_rom_start is the beginning of the data in
ROM, thus is not part of the image).
Change-Id: I4aa0354ee414fd0d46d0f40952e091ba090e7bce
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This option is not building and currently not supported, removing
it because there does not seem to be a use case for it.
Change-Id: Idb8ffedf83f43cffc68a01573c6f2d1a90fc40fb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We are interested in supporting some XIP x86 platforms which are
unable to fetch CPU instructions from system RAM. This requires
refactoring our dynamic IRQ/exc code which currently synthesizes
assembly language instructions to create IRQ stubs on-the-fly.
Instead, a new approach is taken. Given that the configuration at
build time specifies the number of required stubs, use this
to generate a build time a set of tiny stub functions which simply
push a 'stub id' and then call common dynamic interrupt code.
The handler function and handler argument is saved in a table keyed by
this stub id.
CONFIG_EOI_HANDLER_SUPPORTED removed, the code hasn't been conditionally
compiled for some time and in all cases we call _loapic_eoi() when
finished with an interrupt.
Some other out-of-date verbiage in comments related to supporting
non-APIC removed.
Previously, when dynamic exceptions were created a pointer would
be passed in by the caller reserving ram for the stub code. Since
this is no longer feasible, two new Kconfig options have been added.
CONFIG_NUM_DYNAMIC_EXC_STUBS and CONFIG_NUM_DYNAMIC_EXC_NO_ERR_STUBS
control how many stubs are created for exceptions that push
an error code, and no error code, respectively.
SW Interrupts are no longer triggered by "int <vector>" hard-coded
assembly instructions. Instead this is done by sending a self-directed
inter-processor interrupt from the LOAPIC, using a new API
loapic_int_vect_trigger(). In this way we get rid of dynamically
generated code in irq_test_common.h.
All interrupts call _loapic_eoi() when finished, since this is now
the right thing to do for all IRQs, including SW interrupts.
_irq_handler_set() for x86 no longer requires the old function pointer
to be supplied.
Change-Id: I78993d3d00dd153c9051c518b417cce8d3acee9e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit adds asm implementation for the methods:
sys_io_set_bit
sys_io_clear_bit
sys_io_test_bit
sys_io_test_and_set_bit
sys_io_test_and_clear_bit
Change-Id: I144568e113316fa43d943cdc5457cb17e66839c3
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
ARC targets now have access to the address types 'paddr_t' and 'vaddr_t'.
Change-Id: I2cccddbdd76771529e4501aaee6cb2a2b640013e
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
ARM targets now have access to the address types 'paddr_t' and 'vaddr_t'.
Change-Id: Ic7225647f3776d4afa853cf2c4a19699b656866a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This makes the types 'paddr_t' and 'vaddr_t' available via nanokernel.h.
Change-Id: I75b81356566e2063979f2ec46f326d606638efa2
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This was only needed for the older 8259A style PICs which are no
longer supported.
Since we now just support APIC, we always just call loapic_eoi which
no longer requires an argument and informs the IOAPIC that the interrupt
is complete if necessary.
Change-Id: I15c9b7b4f03b872656220af32220b62e043bfa6b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This patch enables defining microkernel events within source code.
This is similar to other private kernel object patches.
The test has been modified a little bit due to the fact that
the event ID is now a memory address, instead of numeric ID.
Change-Id: Ie3c8d4f4e459d9c631e50bb242cf7a05ca8ea82c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Updates the 'gen_idt' tool to generate a mapping of IRQ numbers to
interrupt vector IDs, thereby allowing the IRQ priority to be utilized
when statically connecting an interrupt.
Change-Id: I2e54ceb65145682820dfbd8ca1ee6ec68d71ce1a
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Change-Id: Ie051000e3d3f0f5bdc330d0265010c37acb873bd
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I819d13f0d7a23e3a61dcda6a3ced18810b192158
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I6da43e41f9c6efee577b70513ec368ae3cce0144
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Updates several files to remove mention of Diab toolchain
support, which is no longer supported. These changes do not
affect system operation.
Change-Id: If9de85e595f6685295e565bc94ca17f51d87513f
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
In order to have drivers that are usable cross architecture the
signature for IRQ_CONFIG needs to be the same to avoid #ifdef hell in
the driver code based on architecture.
Update the macro and it usage for existing drivers
Change-Id: I22e142b21d4e984add231d1dbd97020e4823985f
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Introduces the SYS_DEFINE_DEVICE() macro, which supports 5 distinct
levels of device initialization and 100 priorities within each level.
Note: The existing init macros (e.g. nano_early_init()) have been
adapted to utilize the enhanced initialization model, but will
eventually be retired.
Change-Id: If677029d8b711a3fae9b2f32b5470cd97d19aeda
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Drivers do it by themselves, usually either in a dedicated irq
configuration function or direcly in their initialization routine.
Change-Id: Id1cca1a1e3e3f36264d99d1d2f2d651d84e0687e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This functions - reusing _arc_v2_aux_reg_* ones - will ease porting
drivers to ARC architecture hiding arch specific calls under generic
functions. On ARC, auxiliary registers is conceptually comparable to
x86 ports, thus the possibility to bring sys_in/sys_out to access those.
Change-Id: Ic5c0fc41f32ec4ad861dbb58cd8defaf4497bc03
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Change all the Intel and Wind River code license from BSD-3 to Apache 2.
Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Updates the 'gen_idt' tool to generate a bitmap of (statically) allocated
interrupt vectors that is linked into the final image in a manner similar to
the static IDT. The kernel then uses this bitmap when dynamically connecting
an interrupt vector, thereby preventing the dynamic irq connections
from clobbering the static irq connections.
Change-Id: I0a8f488408dad4912736865179f32f63ff1ca98f
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Adds two new fields to the ISR_LIST structure (irq and priority) to allow
the decoupling of the vector ID and priority from the IRQ number at some
future time.
As a result of the addition of these two new fields, the gen_idt tool is
modified to both process these new fields as well as validate them.
Change-Id: I343dac68d99c78168a25b19784140f85d5db7578
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Fixes a bug in the x86 IRQ_CONNECT_STATIC() macro that resulted in setting
the DPL for the interrupt to the IRQ priority level.
Note 1: Using a proper value for the DPL (instead of the priority) prevents
the corruption of the other IDT fields.
Note 2: The priority of the IRQ is completely ignored.
Change-Id: Ic9f59bd91db4b356263f533cc26a0168b1d236e1
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
We are seeing on some platforms that the VMA alignment
does not match the LMA alignment for this section, resulting
in problems when copying into RAM by __csSet(); any copied
sections afterwards end up misaligned in RAM.
While the true fix for this is under investigation, force
4-byte alignment for VMA and LMA.
Change-Id: I627d9e7a3446cbc09dc310a156d8b3268e61c91d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Due to similar padding issue as pipe, the list of task object
may not be used directly. As mentioned before, some compiler/linker
may pad the large struct. For example, compiling under gcc and
march=i686 pads the struct to 32-byte alignment (march=atom to
64-byte alignment). This causes issue with sizeof() and pointer
arithmetic because they have no idea about the padding.
When the stars align in a certain way, these task structs may be
corrupted. So add a task pointer list and use it for task
manipulation. The task list remains as it is beneficial to group
them together to take advantage of cache locality.
Change-Id: I0e86bfe05742040f4540d7854c1ac14e76162776
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit fixes small errors on the asm implementation of arc
register reading and the built-in functions call.
Change-Id: Iea2df715eaefb25095770971ac03d441311abf16
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
The _ARC_V2_IRQ_VECT_BASE register must be set to the vector table in
flash.
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Change-Id: Ied5451c98222f545cd669967023aef26c3d8e48e
- Finally switched from ldw/stw to ldh/sth, as Benjamin noticed in an
earlier comment (I was using ARC ISA, and not ARC V2 ISA). So indeed
ldw/stw are obsolete and equivalent to ldh/std.
- clear, set and test were not working in case of using a memory address
which would not point to a register: bclr, bset and btst requires
registers as operands, and cannot deal with pure memory address (i.e.
something like [rx] is not valid), thus the requirement to load first
the value pointed by the address into a register, operate on that
register and storing the result of it into the pointed address.
Change-Id: Ib9c24c0a2c6d2b02e2d08d24f31cbc1981536a7d
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Doxegenize and cleanup headers for nanokernel
- fibers
- context
- timers
- stacks
Also minor cleanup of x86/arch.h
Change-Id: Ib65568d4ec034b69e8a6214ba4b52a7f719300bb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
sys_in/sys_out are not implemented as there is no "ports" in ARC.
Change-Id: Ie72d6274ae1a2b2ca22955a9764e281e7669b973
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will be helpful also in drivers mostly, where non-atomic bit
setting could be unnecessary.
Change-Id: I10c069387d1045f14337b3ac8acfc7b6c1f106c3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
sys_io.h header file declares the generic API for such operations. It
properly separates port and memory mapped registers, with declaring
respective types: io_port_t and mm_reg_t.
Memory mapped registers are the most common type of registers drivers
will play with. Thus providing generic sys_readX/sys_writeX functions in
sys_io.h. Those are defined as inline as they are really simple.
Ports are mostly (always?) found in x86 architecture.
Currently no ARM or ARC header file propose any implementation of
those. If really necessary (a cross-architecture driver using
sys_in/sys_out functions), those architecture will provide the proper
implementation or at least a macro gluing those towards
sys_read/sys_write.
Change-Id: If77590d4bcefcdfa6aa181a88ced342f8565d5b8
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The term 'context' is vague and overloaded. Its usage for 'an execution
context' is now referred as such, in both comments and some APIs' names.
When the execution context can only be a fiber or a task (i.e. not an
ISR), it is referred to as a 'thread', again in comments and everywhere
in the code.
APIs that had their names changed:
- nano_context_id_t is now nano_thread_id_t
- context_self_get() is now sys_thread_self_get()
- context_type_get() is now sys_execution_context_type_get()
- context_custom_data_set/get() are now
sys_thread_custom_data_set/get()
The 'context' prefix namespace does not have to be reserved by the
kernel anymore.
The Context Control Structure (CCS) data structure is now the Thread
Control Structure (TCS):
- struct ccs is now struct tcs
- tCCS is now tTCS
Change-Id: I7526a76c5b01e7c86333078e2d2e77c9feef5364
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The files idtEnt.h and segselect.h in shared are linked from
the source tree for no good reason adding and extra top level
directory that might be confusing.
The shared/ here means shared between host and target, this is
not longer necessary in our build system.
Change-Id: Id9665e10de7a1d290888d9069be3db9f4330d284
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Highlight the fact that find_[lsb|msb]_set operate on a 32-bit word.
Change-Id: I24cee7709ea6497508dbc7f96a7b4d74fa4bc257
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The new names reflect better what the functions do: they find the first
bit set starting from the least or most significant bit, i.e. they find
the least or most significant bit set, in a 32-bit word.
Change-Id: I6f0ee4b543f6f37c2f08f7067e14e039c92a6f6a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The inline versions are renamed to remove the _inline suffix, and the
non-inline versions are removed from the code base.
Change-Id: Iee2e6adcfb5da1fe0a978a05aa854e10ae82a8b8
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The inline versions are renamed to remove the _inline suffix, and the
non-inline versions are removed from the code base.
Change-Id: I7314b96c42835f15df4c537ec11ab7961d4ee60f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
irq_handler_set, irq_priority_set and irq_disconnect have been made
private by prepending an underscore to their names:
irq_handler_set -> irq_handler_set
irq_priority_set -> irq_priority_set
irq_disconnect -> irq_disconnect
The prototypes have been removed from header files when possible, and
extern statements used in C code where they were called.
_irq_priority_set() for ARM is still in the header file because
IRQ_CONFIG() relies on it.
Change-Id: I2ad585f8156ff80250f6d9eeca4a249a4477fd9d
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This enable defining memory maps in source code in addition to
defining in MDEF files. This introduces the macro
DEFINE_MEM_MAP(mem_map_name, ...). The memory maps created this
way are the same, in functionality, as those defined in MDEF
files. They can be manipulated by the standard microkernel
memory map APIs.
Define the memory map using:
DEFINE_MEM_MAP(mem_map1, blocks, block_size);
and "mem_map1" can be used, for example:
task_mem_map_alloc(mem_map1, ...);
or,
task_mem_map_free(mem_map1, ...);
etc.
To use the memory map defined in another source file, simply add:
extern const kmemory_map_t mem_map1;
to the desired C or header file.
Change-Id: I9c551b90f9d0a95f961fd8ec1c5278c2ea44312d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The _k_mem_map_list was a static array generated by sysgen,
where it containing all pre-defined memory maps from MDEF file.
To support private memory map objects (aka, defining them within
source files), the list has to accommodate memory maps that
are not only processed through sysgen, but also those defined
within source files.
This is done by creating a new section in binary, and all memory
map pointers go into this section. By doing this, the list
can still be manipulated as an array.
Change-Id: I1f3414b72f685fef4b99850749178661f14d9345
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This enable defining pipes in source code in addition to
defining in MDEF files. This introduces the macro
DEFINE_PIPE(pipe_name, ...). The pipes created this
way are the same, in functionality, as those defined in MDEF
files. They can be manipulated by the standard microkernel
pipe APIs.
Define the pipe using:
DEFINE_PIPE(pipe1, size);
and "pipe1" can be used, for example:
task_pipe_put(pipe1, ...);
or,
task_pipe_get(pipe1, ...);
etc.
To use the pipe defined in another source file, simply add:
extern const kpipe_t pipe1;
to the desired C or header file.
Change-Id: Iae8e04706359bc18aae51acc75df3e3d26388882
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The _k_pipe_list was a static array generated by sysgen,
where it containing all pre-defined pipes from MDEF file.
To support private pipe objects (aka, defining pipes within
source files), the pipe list has to accommodate pipes that
are not only processed through sysgen, but also those defined
within source files.
This is done by creating a new section in binary, and all pipe
pointers go into this section. By doing this, the pipe list
can still be manipulated as an array. The reason behind
putting the pointers to pipe, instead of the pipe objects
themselves, is that some compiler/linker may pad the large pipe
struct. For example, compiling under gcc and march=i686 pads
the struct to 32-byte alignment (march=atom to 64-byte alignment).
This causes issue with sizeof() and pointer arithmetic because
they have no idea about the padding. So use pointers here to
prevent padding.
Change-Id: I6d3b75614c4d8760c037a5c26746410d4e4b17cb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This enable defining tasks in source code in addition to
defining in MDEF files. This introduces the macro
DEFINE_TASK(task_name). The tasks created this
way are the same, in functionality, as those defined in MDEF
files. They can be manipulated by the standard microkernel
task APIs.
Define the task using:
DEFINE_TASK(task1, priority, entry_func, stack_size, groups);
and "task1" can be used, for example:
task_start(task1);
or,
task_abort(task1);
etc.
To use the task defined in another source file, simply add:
extern const ktask_t task1;
to the desired C or header file.
Change-Id: Ib2f3572950ca74b359b7fde1ccd6cfd04783eefb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The _k_task_list was a static array generated by sysgen,
where it containing all pre-defined tasks from MDEF file.
To support private task objects (aka, defining tasks within
source files), the task list has to accommodate tasks that
are not only processed through sysgen, but also those defined
within source files.
This is done by creating a new section in binary, and all task
objects go into this section. By doing this, the task list
can still be manipulated as an array, which is required for
task group operation.
Change-Id: I799d6967567079498bc414e0cb809e8af856b53e
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Galileo testing uses Linux kexec() feature to load Zephyr OS.
kexec() requires all program headers page size aligned.
Add page size padding to initlevel section in order to make
BSS page aligned.
Change-Id: I7c0e309be70aef45b347b16c6d5c01bdf5659351
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Removes references to obsolete BSP terminology. Where appropriate, replaces it
with platform terminology.
Change-Id: If38c859338c7cf0de58430336e1046b28f9e9944
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The configuration of SRAM and flash options are no longer hardcoded in the
platform's linker script file, but are instead defined in the platform
configuration file.
Change-Id: I557a8228080d607f6add5f86b9b2509ed3fd31ce
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Updates Kconfig option names as part of transforming BSPs to platforms.
Change-Id: If397bcac8b058e5700e82c3cabbfe64588316d1d
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Remove function name from comment and add @brief instead.
Also capitilize first letter.
Change-Id: Ib708b49bf02e5bc89b0066637a55874e659637e0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Previous comment style used RETRURNS:, use @return to comply
with javadoc style.
Change-Id: Ib1dffd92da1d97d60063ec5309b08049828f6661
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The change replaces multiple asterisks to ** at
the beginning of comments and adds a space before
the asterisks at the beginning of lines.
Change-Id: I7656bde3bf4d9a31e38941e43b580520432dabc1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
In order to provide the same irq_connect() on all platforms
on x86, irq_connect() now uses a static array of interrupt
stubs. Device driver does not need to provide interrupt stub
to irq_connect() function.
Add NUM_DYNAMIC_STUBS configuration parameter, the number
of interrupt stubs used for dynamic interrupt registration.
Modify tests for unified interrupt register API
Tests that deal with interrupts are modified to work
with the new interrupt registration API.
Add CONFIG_NUM_DYNAMIC_STUBS option to dynamic interrupt projects
Projects that use dynamic interrupt handler registration on x86
have to include CONFIG_NUM_DYNAMIC_STUBS parameter in the
configuration.
Change-Id: Ic90c726485521a57cf695fd3edc8cac85d0b827d
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
IRQ_CONNECT_STATIC() macro provides static interrupt registration.
It creates an entry for _sw_isr_table, table of interrupt handlers.
IRQ_CONFIG() macro provides interrupt controller configuration.
On ARM platform it configures the priority of each interrupt.
_sw_isr_table is implemented the way that each of it's elements
is located in individual section. Sections are marked a "linkonce",
thus when a device driver declares an interrupt handler, it overwrites
the default _sw_isr_table entry.
Change-Id: I182bf7158dd67f45b597783dca038a4f78166a03
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
In order to simplify x86 interrupt stub creation, each interrupt
controller implements an interrupt stub definition macro.
Add IRQ_CONNECT_STATIC() for static interrupt registration, and
construct the interrupt stubs name from device and interrupt
handler names.
Add IRQ_CONFIG() macro for the interrupt controller configuration.
On x86 platform it programs APIC to associate an IRQ number with
the interupt vector.
Add HPET_TIMER0_INT_PRI parameter to Quark platform header to
make it build correctly.
Change-Id: I24ad25e1aa807ffa63733a27ad882877fcad72af
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
The Cortex-M0 processor is not supported.
Change-Id: I3ada6615a8b41eb318f80edb13947f70459c761b
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Makes name more consistent with other CPU_CORTEX_M* options.
Change-Id: I65968cb300207ba0de6231d9a67f2720be77b6ba
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
CPU_CORTEX_M3_M4 replaces CPU_CORTEXM3 as the umbrella option for Cortex M3/M4
processors.
NOTE: Selecting CPU_CORTEXM4 still currently forces the selection of
CPU_CORTEXM3. Breaking that forced select will be done in a later commit.
Change-Id: I0f36b3a2adc5c6c66db4e9b6353b921199544deb
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The #include <__assert.h> in nvic.h must be guarded by __ASMLANGUAGE
since nvic.h is usable by asm code, and __assert.h is C-only.
Change-Id: I16d72e4579705dbd0bfb55a787525c5938fd1f22
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This commit set back .S as the assembly code extension for Kbuild.
Change-Id: Ib0119876bd0bed6617bbfbad2ca6a44e172ab042
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Eliminates references to the obsolete OS name. In most cases the
name is simply removed, as it isn't necessary.
Change-Id: I32f9e7390e436aec008a9454b72657e129d65152
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
This file doesn't belong in the architecture-specific portion of
the tree, and its contents don't warrant their own file, so the
content is moved to the main nanokernel public API include file.
Change-Id: I0455fc9eb4f5ca31a8e6b487f56b09d0562fdb77
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Introduces nano_internal.h, which will declare all architecture-
independent non-public nanokernel APIs. This file is automatically
incorporated by the various architecture-specific include files
for non-public nanokernel APIs, and will not normally be included
directly by any other files.
Change-Id: I9f3de812a5747cc720fa0ff739007315e8d07dd9
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
These declarations are now co-located with the declarations
for the routines that utilize them.
Change-Id: I70940923d9e424345aeac60cb5ddd7f7a2a54734
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
These files now have no useful content.
Change-Id: If5d2df361eb8769ca38c4ae63f68a5681b3ad85b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
These now appear in the files which declare other non-public
nanokernel APIs.
Change-Id: Iea01d6de44851a08b308004b2c3104c08b020970
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Since cputype.h no longer has any meaningful content it can be
eliminated, along with the arch-specific files it incorporated.
(This means that the arch-specific nanokernel public APIs are
now referenced only via cpu.h and its derivatives.)
Change-Id: I7f35b6c3c6c092d61c372ff85d73e49414474938
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Moves these macros to the main public API include file for each
supported architecture, since the <arch>type.h include file is
to be eliminated.
Change-Id: Ia87b9c0bed1501bcce7f363bd4155f7ef642376a
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Several files were not explicitly including APIs that they reference,
which could eventually lead to trouble.
Change-Id: Ib33cadfa658280df3fcb4c670463d41b63097b31
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Add infrastructure support having multiple instances of a driver
configured into the system each with its own compile time
configuration information.
Change-Id: I1e447af18311139b43f74fe0439483ccd132b63f
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The "__stack" tag is to be used to align an array (to STACK_ALIGN) for stack
use by either a fiber or task.
Change-Id: I5828f3ee1b09b0b5ba894ea30689d179de347494
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The __attribute__ keyword is toolchain specific.
Change-Id: Ia3c0ff54d778785679c864704f8db6a3ba898948
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The __attribute__ keyword is toolchain specific.
Change-Id: I2183d154ccdb9b5bed3bc245cc37cbf4c5cc62cc
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Completes the renaming of nanoFiberStart() -> fiber_fiber_start().
There is little value in listing the callers of _NewContext() in its function
header. Not only was the (deleted) list both incomplete and wrong, keeping
it around and properly updated requires error prone maintenance.
Change-Id: Ic45f51b285c027a2e8be331c0d28c16bdc97647d
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
It is a fatal error if the microkernel is configured with either too few
command packets or too few timer packets.
NOTE: During this refactoring of _Cget(), not only is it renamed to
_nano_fiber_lifo_get_panic(), but it is moved into "nano_lifo.c".
Change-Id: I1d866cda1b444da04877f7eda03762b6e83c9a6f
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This reason code will be used indicate that the kernel failed to allocate a
critical resource (such as a command packet or a timer packet).
Change-Id: I6d4c3d96fc70b2b8cab4027b1b8e4febf4d6c474
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Since ARC does not support the microkernel, there is no need to
define any microkernel event symbols for it. (And TICK_EVENT is
an architecture-independent concept anyway ...)
Change-Id: I918a55743f8685ef23b9bb5a8afc67b905ab9766
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
1) Renames APIs to align them with conventions used by other
general-context nanokernel APIs.
2) Relocates implementation of these APIs to the architecture-
independent portion of the nanokernel.
Change-Id: I1aa60029aaa96697cd8fcb594bbae23ba6656661
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
These APIs are no longer referenced anywhere.
Change-Id: I56e3410b9fb6bc4eb72bc9299b33f75227916434
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
This is not required since the secure string library routines
have been removed.
Change-Id: I284a21e4167d9bb6f78354d809c563a4c52f619c
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Renaming the directory include/nanokernel to be include/arch, which
better reflects the real nature of the directory and the contents
inside.
Change-Id: I2bc33ebc6715e2f0403227a558279fdf52398ade
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>