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doxygen: fixed typos and parameter references

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Change-Id: Ica65e2cd0e49c08b1b8b086614267caef632c891
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2015-10-04 10:01:56 -04:00
commit 629e69b493
8 changed files with 49 additions and 48 deletions
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12
include/arch/arm/cortex_m/irq.h
View file

@ -69,9 +69,9 @@ extern void _IntExit(void);
*
* @brief Connect a routine to interrupt number
*
* For the device <device> associates IRQ number <irq> with priority
* <priority> with the interrupt routine <isr>, that receives parameter
* <parameter>
* For the device @a device associates IRQ number @a irq with priority
* @a priority with the interrupt routine @a isr, that receives parameter
* @a parameter
*
* @return N/A
*
@ -89,9 +89,11 @@ extern void _irq_priority_set(unsigned int irq, unsigned int prio);
*
* @brief Configure interrupt for the device
*
* For the given device do the neccessary configuration steps.
* Fpr ARM platform, set the interrupt priority
* For the given device do the necessary configuration steps.
* For ARM platform, set the interrupt priority
*
* @param device Device to configure
* @param irq IRQ number
* @return N/A
*
*/

59
include/arch/arm/cortex_m/nvic.h
View file

@ -89,13 +89,14 @@ Supports up to 240 IRQs and 256 priority levels.
*
* @brief Enable an IRQ
*
* Enable IRQ #<irq>, which is equivalent to exception #<irq>+16
* Enable IRQ #@a irq, which is equivalent to exception #@a irq+16
*
* @param irq IRQ number
*
* @return N/A
*/
static inline void _NvicIrqEnable(unsigned int irq /* IRQ number */
)
static inline void _NvicIrqEnable(unsigned int irq)
{
__scs.nvic.iser[REG_FROM_IRQ(irq)] = 1 << BIT_FROM_IRQ(irq);
}
@ -104,13 +105,13 @@ static inline void _NvicIrqEnable(unsigned int irq /* IRQ number */
*
* @brief Find out if an IRQ is enabled
*
* Find out if IRQ #<irq> is enabled.
* Find out if IRQ #@a irq is enabled.
*
* @param irq IRQ number
* @return 1 if IRQ is enabled, 0 otherwise
*/
static inline int _NvicIsIrqEnabled(unsigned int irq /* IRQ number */
)
static inline int _NvicIsIrqEnabled(unsigned int irq)
{
return __scs.nvic.iser[REG_FROM_IRQ(irq)] & (1 << BIT_FROM_IRQ(irq));
}
@ -119,13 +120,12 @@ static inline int _NvicIsIrqEnabled(unsigned int irq /* IRQ number */
*
* @brief Disable an IRQ
*
* Disable IRQ #<irq>, which is equivalent to exception #<irq>+16
*
* Disable IRQ #@a irq, which is equivalent to exception #@a irq+16
* @param irq IRQ number
* @return N/A
*/
static inline void _NvicIrqDisable(unsigned int irq /* IRQ number */
)
static inline void _NvicIrqDisable(unsigned int irq)
{
__scs.nvic.icer[REG_FROM_IRQ(irq)] = 1 << BIT_FROM_IRQ(irq);
}
@ -134,15 +134,15 @@ static inline void _NvicIrqDisable(unsigned int irq /* IRQ number */
*
* @brief Pend an IRQ
*
* Pend IRQ #<irq>, which is equivalent to exception #<irq>+16. CPU will handle
* Pend IRQ #@a irq, which is equivalent to exception #@a irq+16. CPU will handle
* the IRQ when interrupts are enabled and/or returning from a higher priority
* interrupt.
* @param irq IRQ number
*
* @return N/A
*/
static inline void _NvicIrqPend(unsigned int irq /* IRQ number */
)
static inline void _NvicIrqPend(unsigned int irq)
{
__scs.nvic.ispr[REG_FROM_IRQ(irq)] = 1 << BIT_FROM_IRQ(irq);
}
@ -151,13 +151,13 @@ static inline void _NvicIrqPend(unsigned int irq /* IRQ number */
*
* @brief Find out if an IRQ is pending
*
* Find out if IRQ #<irq> is pending
* Find out if IRQ #@a irq is pending
*
* @param irq IRQ number
* @return 1 if IRQ is pending, 0 otherwise
*/
static inline int _NvicIsIrqPending(unsigned int irq /* IRQ number */
)
static inline int _NvicIsIrqPending(unsigned int irq)
{
return __scs.nvic.ispr[REG_FROM_IRQ(irq)] & (1 << BIT_FROM_IRQ(irq));
}
@ -166,15 +166,15 @@ static inline int _NvicIsIrqPending(unsigned int irq /* IRQ number */
*
* @brief Unpend an IRQ
*
* Unpend IRQ #<irq>, which is equivalent to exception #<irq>+16. The previously
* Unpend IRQ #@a irq, which is equivalent to exception #@a irq+16. The previously
* pending interrupt will be ignored when either unlocking interrupts or
* returning from a higher priority exception.
*
* @param irq IRQ number
* @return N/A
*/
static inline void _NvicIrqUnpend(unsigned int irq /* IRQ number */
)
static inline void _NvicIrqUnpend(unsigned int irq)
{
__scs.nvic.icpr[REG_FROM_IRQ(irq)] = 1 << BIT_FROM_IRQ(irq);
}
@ -183,14 +183,14 @@ static inline void _NvicIrqUnpend(unsigned int irq /* IRQ number */
*
* @brief Set priority of an IRQ
*
* Set priority of IRQ #<irq> to <prio>. There are 256 priority levels.
* Set priority of IRQ #@a irq to @a prio. There are 256 priority levels.
*
* @param irq IRQ number
* @param prio Priority
* @return N/A
*/
static inline void _NvicIrqPrioSet(unsigned int irq, /* IRQ number */
unsigned int prio /* priority */
)
static inline void _NvicIrqPrioSet(unsigned int irq, unsigned int prio)
{
__ASSERT(prio < 256, "invalid priority\n");
__scs.nvic.ipr[irq] = prio;
@ -200,13 +200,14 @@ static inline void _NvicIrqPrioSet(unsigned int irq, /* IRQ number */
*
* @brief Get priority of an IRQ
*
* Get priority of IRQ #<irq>.
* Get priority of IRQ #@a irq.
*
* @param irq IRQ number
*
* @return the priority level of the IRQ
*/
static inline uint32_t _NvicIrqPrioGet(unsigned int irq /* IRQ number */
)
static inline uint32_t _NvicIrqPrioGet(unsigned int irq)
{
return __scs.nvic.ipr[irq];
}
@ -215,14 +216,14 @@ static inline uint32_t _NvicIrqPrioGet(unsigned int irq /* IRQ number */
*
* @brief Trigger an interrupt via software
*
* Trigger interrupt #<irq>. The CPU will handle the IRQ when interrupts are
* Trigger interrupt #@a irq. The CPU will handle the IRQ when interrupts are
* enabled and/or returning from a higher priority interrupt.
*
* @param irq IRQ number
* @return N/A
*/
static inline void _NvicSwInterruptTrigger(unsigned int irq /* IRQ number */
)
static inline void _NvicSwInterruptTrigger(unsigned int irq)
{
#if defined(CONFIG_PLATFORM_TI_LM3S6965_QEMU)
/* the QEMU does not simulate the STIR register: this is a workaround */

2
include/arch/x86/arch.h
View file

@ -77,7 +77,7 @@
* Floating point register set alignment.
*
* If support for SSEx extensions is enabled a 16 byte boundary is required,
* since the 'fxsave' and 'fxrstor' instructions require this. In all other
* since the 'fxsave' and 'fxrstor' instructions require this. In all other
* cases a 4 byte boundary is sufficient.
*/

2
include/microkernel/task.h
View file

@ -164,7 +164,7 @@ extern void task_abort_handler_set(void (*func)(void));
* @param func function to call from within the microkernel server fiber
* @param argp argument to pass to custom function
*
* @return return value from custom <func> call
* @return return value from custom @a func call
*/
extern int task_offload_to_fiber(int (*)(), void *);

6
include/microkernel/task_irq.h
View file

@ -57,13 +57,11 @@
*
* @param irq_obj IRQ object identifier
* @param irq Request IRQ
* @param Requested interrupt priority
* @param priority Requested interrupt priority
*
* @return assigned interrupt vector if successful, INVALID_VECTOR if not
*/
extern uint32_t task_irq_alloc(kirq_t irq_obj,
uint32_t irq,
uint32_t priority);
extern uint32_t task_irq_alloc(kirq_t irq_obj, uint32_t irq, uint32_t priority);
/**
* @cond internal
*/

8
include/misc/event_logger.h
View file

@ -73,7 +73,7 @@ void sys_event_logger_init(struct event_logger *logger,
*
* @param logger Pointer to the event logger used.
* @param event_id The identification of the profiler event.
* @param data Pointer to the data of the message.
* @param event_data Pointer to the data of the message.
* @param data_size Size of the buffer in 32-bit words.
*
* @return No return value.
@ -88,8 +88,8 @@ void sys_event_logger_put(struct event_logger *logger, uint16_t event_id,
* @details Retrieve an event message from the ring buffer and copy it to the
* provided buffer. If the provided buffer is smaller than the message
* size the function returns -EMSGSIZE. Otherwise return the number of 32-bit
* words copied. The functon retrieves messages in FIFO order. If there is no
* message in the buffer the fuction returns immediately. It can only be called
* words copied. The function retrieves messages in FIFO order. If there is no
* message in the buffer the function returns immediately. It can only be called
* from a fiber.
*
* @param logger Pointer to the event logger used.
@ -113,7 +113,7 @@ int sys_event_logger_get(struct event_logger *logger, uint16_t *event_id,
* @details Retrieve an event message from the ring buffer and copy it to the
* provided buffer. If the provided buffer is smaller than the message
* size the function returns -EMSGSIZE. Otherwise return the number of 32-bit
* words copied. The functon retrieves messages in FIFO order. The caller pends
* words copied. The function retrieves messages in FIFO order. The caller pends
* if there is no message available in the buffer. It can only be called from a
* fiber.
*

4
include/pwm.h
View file

@ -29,7 +29,8 @@
*/
/**
* @file Public PWM Driver APIs
* @file
* @brief Public PWM Driver APIs
*/
#ifndef __PWM_H__
@ -161,7 +162,6 @@ static inline int pwm_all_set_values(struct device *dev,
* This overrides any ON/OFF values being set before.
*
* @param dev Pointer to device structure for driver instance.
* @param pwm PWM output
* @param duty Duty cycle to set the PWM to (in %, e.g. 50 => 50%)
*
* @return DEV_OK if successful, otherwise failed.

4
include/spi.h
View file

@ -172,9 +172,9 @@ static inline int spi_write(struct device *dev, uint8_t *buf, uint32_t len)
*
* @param dev Pointer to the device structure for the driver instance
* @param tx_buf Memory buffer that data should be transferred from
* @param tx_len Size of the memory buffer available for reading from
* @param tx_buf_len Size of the memory buffer available for reading from
* @param rx_buf Memory buffer that data should be transferred to
* @param rx_len Size of the memory buffer available for writing to
* @param rx_buf_len Size of the memory buffer available for writing to
*
* @return DEV_OK if successful, another DEV_* code otherwise.
*/