Commit graph

408 commits

Author SHA1 Message Date
Daniel Leung
ec9a413983 boards: x86: make up_squared default to x86_64
This makes the up_squared board default to x86_64.
This also adds a new board, up_squared_32, for when 32-bit
is desired.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-19 19:19:51 +02:00
Daniel Leung
51c5c50946 boards: x86/up_squared: remove SYS_CLOCK_HW_CYCLES_PER_SEC
This is defined in SoC and there is no need to override it
in the board config.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-19 19:19:51 +02:00
Daniel Leung
86b3f2df82 boards: x86/up_squared: specify CONFIG_X86_MMU_PAGE_POOL_PAGES
Given that the UP Squared has relatively large memory, the default
number of pages allocated for page tables are not enough, and
resulting in asserting in the page table initialization code.
So change the number of pages to a large number to accomodate
various applications.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-19 19:19:51 +02:00
Johan Hedberg
9a7171304f soc: x86: apollo_lake: Fix default timer selection
The APIC timer is not supported e.g. with SMP (which will be enabled
by default soon as well) so the sensible choice is to default to HPET.
Also, the default makes more sense to be on the SoC side, so move it
there from the board defaults.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2020-05-19 17:25:36 +02:00
Johan Hedberg
7278375902 boards: x86: gpmrb: Remove SYS_CLOCK_HW_CYCLES_PER_SEC default
Let the default value for SYS_CLOCK_HW_CYCLES_PER_SEC come from the
SoC instead. Furthermore, a default for HPET_TIMER didn't even make
sense since this timer doesn't do anything with the Kconfig value.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2020-05-19 17:25:36 +02:00
Wentong Wu
56c8f49b5c boards: qemu_x86: enable icount mode
Enable icount mode for qemu_x86 platform, The icount shift value is
selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2020-05-14 13:52:07 +02:00
Zide Chen
f32eeba925 dts: x86: configure different IO APIC delivery modes for various devices
For HPET devices, configure it with fixed delivery mode because HPET
timer interrupt is needed to fuel the scheduler for all CPUS.

For all other type of devices, like UART, I2C, GPIO, Ethernet, etc.
configure them as lowest priority delivery mode, in which IO APIC
delivers the interrupt to the processor core that is executing at the
lowest priority among all the processors listed in the specified
destination. In this case, the device drivers can avoid the trouble of
handling repeated interrupts delivered to all CPUS.

Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-05-08 22:32:39 -04:00
Daniel Leung
eb10b87430 boards: x86/minnowboard: specify CONFIG_X86_MMU_PAGE_POOL_PAGES
Given that the Minnowboard has relatively large memory, the default
number of pages allocated for page tables are not enough, and
resulting in asserting in the page table initialization code.
So change the number of pages to a large number to accomodate
various applications.

Fixes #24353

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-07 20:32:31 -07:00
Andrew Boie
d2dce5e845 x86: Revert "qemu_x86: use icount for 32-bit"
This was causing problems on some network tests.

This reverts commit 9b055ecf82.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-05-07 15:37:43 -07:00
Kumar Gala
a5b45d9567 boards: Remove Kconfig I2C_[0-9] usage
The Kconfig I2C_[0-9] sybmols don't have any meaning for the majority of
SoCs.  The drivers doesn't utilize them and no sample or test code does
either so we can remove setting them in board Kconfig.defconfig files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-06 10:55:38 -05:00
Andrew Boie
9b055ecf82 qemu_x86: use icount for 32-bit
Options summary:

 -icount shift=5: Execute one instruction every 32ns of virtual time
 -icount align=off: Do not synchronise the host and guest clocks
 -icount sleep=off: Advance virtual time without sleeping/waiting
 -rtc clock=vm: Isolate the guest RTC time from the host

64-bit still has some issues that are being looked at.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-05-03 21:43:13 -04:00
Kumar Gala
42f3b6b786 dts: Remove unused or dead dts_fixup.h
Remove dts_fixup.h files that are not used (empty) or the defines aren't
used anymore and thus can be removed.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-30 18:06:23 -05:00
Kumar Gala
50345848b4 drivers: flash: flash_simulator: Convert to new DT macros
Convert flash_simulator to use new DT macros and remove associated
defines in dts_fixup.h.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-30 04:47:44 -05:00
Kumar Gala
6d6cf4bb9d soc: x86: atom: sync linker / memory map on atom with ia32
Rework the atom/linker.ld to match how ia32/linker.ld works with regards
to how PHYS_LOAD_ADDR & PHYS_RAM_ADDR are set based on CONFIG_XIP and
from which DT_PHYS_{RAM,LOAD}_ADDR defines.  We update the minnowboard
dts and atom.dtsi files to keep in sync with this.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-29 10:19:59 -07:00
Kumar Gala
7a15afc1d4 drivers: flash: replace DT_FLASH_DEV_NAME with DT macro
Replace DT_FLASH_DEV_NAME with DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL.
We now set zephyr,flash-controller in the chosen node of the device
tree to the flash controller device.

NOTE: For a SoCs with on die flash, this points to the controller and
      not the 'soc-nv-flash' node.  Typically the controller is the
      parent of the 'soc-nv-flash' node).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-27 18:43:20 -05:00
Jennifer Williams
656481d803 boards: x86: minnowboard: doc: update minnowboard links
The documentation references now out-dated links to websites for
board landing page, and firmware download and instructions. This
commit updates the links and adds a link to the latest firmware
development for reference.

Fixes #24325

Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
2020-04-17 08:10:36 -04:00
Henrik Brix Andersen
5b1e589dce boards: x86: qemu_x86: list eeprom as supported
List 'eeprom' as a supported feature for the qemu_x86 board.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-03-30 08:24:06 -05:00
Enjiax Mai
b4135a8b8c board: acrn : config for the flash runner
Add config for acrn using sanitycheck automation.

Signed-off-by: Enjiax Mai <enjiax.mai@intel.com>
2020-03-20 10:50:33 +01:00
Timo Teräs
6fd168e9a1 driver: uart: ns16550: convert to DT_INST_*
Change to code to use the automatically generated DT_INST_*
defines and remove the now unneeded configs and fixups.

Signed-off-by: Timo Teräs <timo.teras@iki.fi>
2020-03-14 02:22:05 +02:00
Kumar Gala
836b485377 drivers: ethernet: e1000: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 16:36:21 -06:00
Ulf Magnusson
a42a42cd5a kconfig: Replace defconfig singe-symbol 'if's with 'depends on'
Same deal as in commit eddd98f ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for all symbols defined within defconfig
files. See that commit for an explanation.

Maybe 'if's were used originally to mirror the 'if's in the main Kconfig
files, and then it got copied around by people assuming 'if' must work
differently from 'depends on'. It doesn't match in every spot at least.
Better to keep it simple and just consistently use 'depends on' when
it's a single symbol/choice I think. Helps reinforce that 'if' isn't
magic too.

Verified by printing all Kconfig menu nodes (symbols, choices, menus,
etc.) before and after the change and diffing (should show no
difference).

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-12 10:32:13 -06:00
Ulf Magnusson
c5839f834b kconfig: Remove assignments to CONFIG_<arch> syms and hide them
All board defconfig files currently set the architecture in addition to
the board and the SoC, by setting e.g. CONFIG_ARM=y. This spams up
defconfig files.

CONFIG_<arch> symbols currently being set in configuration files also
means that they are configurable (can be changed in menuconfig and in
configuration files), even though changing the architecture won't work,
since other things get set from -DBOARD=<board>. Many boards also allow
changing the architecture symbols independently from the SoC symbols,
which doesn't make sense.

Get rid of all assignments to CONFIG_<arch> symbols and clean up the
relationships between symbols and the configuration interface, like
this:

1. Remove the choice with the CONFIG_<arch> symbols in arch/Kconfig and
   turn the CONFIG_<arch> symbols into invisible
   (promptless/nonconfigurable) symbols instead.

   Getting rid of the choice allows the symbols to be 'select'ed (choice
   symbols don't support 'select').

2. Select the right CONFIG_<arch> symbol from the SOC_SERIES_* symbols.
   This makes sense since you know the architecture if you know the SoC.

   Put the select on the SOC_* symbol instead for boards that don't have
   a SOC_SERIES_*.

3. Remove all assignments to CONFIG_<arch> symbols. The assignments
   would generate errors now, since the symbols are promptless.

The change was done by grepping for assignments to CONFIG_<arch>
symbols, finding the SOC_SERIES_* (or SOC_*) symbol being set in the
same defconfig file, and putting a 'select' on it instead.

See
https://github.com/ulfalizer/zephyr/commits/hide-arch-syms-unsquashed
for a split-up version of this commit, which will make it easier to see
how stuff was done. This needs to go in as one commit though.

This change is safer than it might seem re. outstanding PRs, because any
assignment to CONFIG_<arch> symbols generates an error now, making
outdated stuff easy to catch.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-02-08 00:50:08 -06:00
Zide Chen
d0126a037d boards/x86/acrn: build it in x86_64 mode and switch to X2APIC
- added CONFIG_X86_64 since ACRN hypervisor supports x86_64 capable
  platforms only.
- removed CONFIG_SET_GDT: Zephyr doesn't support it in x86_64, and ACRN
  doesn't require the guests to setup GDT during boot time.
- added CONFIG_X2APIC, which is preferred by ACRN, which makes it
  possible to pass through local APIC to the guests.

Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-02-07 14:14:53 -08:00
Kumar Gala
1dc4b1dd2f boards: shrink image sizes
Reduce images sizes of boards.  Get a roughly 3x reduction in size.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-07 13:52:45 -05:00
Robert Lubos
e93ccd9973 boards: qemu_x86: Add ieee802154 capability
Extend `qemu_x86` board configuration with `ieee802154` capability, to
allow it to execute `ieee802154` tests.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-01-22 11:57:11 -06:00
Andy Ross
74c582dc06 Revert "x86: qemu_x86_64: workaround SMP issues in x86"
Races seem fixed, at least the ones measurable by existing tests.

This reverts commit 3f3c72a911.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-01-21 14:47:52 -08:00
Andrzej Puzdrowski
5f89145d6b boards: remove NFFS mentions from comments/doc
Replaced NFFS mentions by LittleFS in all <board>.dts comments
to storage partitions.
Replaced NFFS by LittleFS in a few boards documentation.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2020-01-21 15:32:47 +01:00
Andrew Boie
e34f1cee06 x86: implement kernel page table isolation
Implement a set of per-cpu trampoline stacks which all
interrupts and exceptions will initially land on, and also
as an intermediate stack for privilege changes as we need
some stack space to swap page tables.

Set up the special trampoline page which contains all the
trampoline stacks, TSS, and GDT. This page needs to be
present in the user page tables or interrupts don't work.

CPU exceptions, with KPTI turned on, are treated as interrupts
and not traps so that we have IRQs locked on exception entry.

Add some additional macros for defining IDT entries.

Add special handling of locore text/rodata sections when
creating user mode page tables on x86-64.

Restore qemu_x86_64 to use KPTI, and remove restrictions on
enabling user mode on x86-64.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-01-17 16:17:39 -05:00
Ulf Magnusson
c935c26819 boards: x86: minnowboard: Do not assign promptless X86_NO_SPECTRE_V4
Assignments to promptless symbols have no effect. Flagged by
https://github.com/zephyrproject-rtos/zephyr/pull/20742.

From looking at
http://www.mouser.com
  /catalog/specsheets/CircuitCO_595-MINNOWMAX-DUAL%20Data%20Sheet.pdf
, this board uses an Intel Atom E3815 or an Intel Atom E3825 CPU.

Both of those CPUs are listed as vulnerable to all three variants of
Meltdown and Spectre in
https://www.techarp.com/guides/complete-meltdown-spectre-cpu-list/6/.

All the X86_NO_SPECTRE_V* symbols default to n (and it seems nothing
turns them on at the moment), so just remove the assignment, which will
be a no-op.

Also remove the comment re. Spectre V4, as it seems this board is
vulnerable to more than that, though I could've missed something.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-16 14:34:19 -05:00
Anas Nashif
3f3c72a911 x86: qemu_x86_64: workaround SMP issues in x86
We have some races causing random failures with this platform, set cpu
number to one while we investigate and fix the issue.

Related to #21317

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-15 12:05:44 -05:00
Ulf Magnusson
5d6168f9c6 boards: minnowboard: kconfig: Do not assign promptless CPU_ATOM symbol
Assignments have no effect on promptless symbols. Flagged by
https://github.com/zephyrproject-rtos/zephyr/pull/20742.

This symbol is enabled through being selected by SOC_ATOM in
soc/x86/atom/Kconfig.soc.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-14 16:34:25 -05:00
Andrew Boie
808cca0efb x86: disable usermode on 64-bit unless no meltdown
KPTI is still work-in-progress on x86_64. Don't allow
user mode to be enabled unless the SOC/board configuration
indicates that the CPU in use is invulnerable to meltdown
attacks.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-01-13 16:35:10 -05:00
Laczen JMS
20623dfa4c drivers: eeprom: Add support for eeprom simulator
Add support for a eeprom simulator. The PR limits the addition to
qemu_x86 but it can easily be added to other devices by defining the
eeprom simulator in the dts and setting 'CONFIG_EEPROM_SIMULATOR=y'

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-09 20:28:19 +01:00
Ulf Magnusson
fa128cb0ac boards: up_squared: kconfig: Remove unused board variant symbols
The CONFIG_UP_SQUARED_{ATOM,CELERON,PENTIUM} symbols are unused after
commit c5e582038c ("boards/x86/up_squared: default to new local APIC
timer").

Since these symbols are the only thing in boards/x86/up_squared/Kconfig,
which is osource'd in in board/Kconfig, just remove the entire file.

Found with a script.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-20 21:48:29 -05:00
Ulf Magnusson
984bfae831 global: Remove leading/trailing blank lines in files
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.

Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.

Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-11 19:17:27 +01:00
Ulf Magnusson
98d02613a3 kconfig: Remove assignments to promptless CPU_MINUTEIA symbol
CPU_MINUTEIA has no prompt. Assignments in configuration files have no
effect on symbols without prompts. A prompt means the symbol is
user-configurable.

CPU_MINUTEIA is instead enabled indirectly through being selected by
other symbols.

Detected through some work-in-progress improved error checking.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-09 16:41:32 -05:00
Carles Cufi
5b26b01bb6 soc: x86: apollo_lake: Turn .rst doc into .txt
In order to avoid a warning from Sphinx complaining that the
supported_features.rst file is not included in any ToC, rename it to
.txt so that Sphinx understands that this is only a snippet to be
included in other files.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-12-06 16:56:24 +01:00
peng1 chen
d22e91b61a up_squared: config the flash runner.
set the flash runner of up squared board using misc-flasher.

Signed-off-by: peng1 chen <peng1.chen@intel.com>
2019-11-24 23:56:02 -05:00
Andrew Boie
1c97851726 x86: enable MMU on 64-bit with SMP
The races are believed to be resolved with the patch to
irq_offload(). Allow the MMU to be turned on and enable
it for qemu_x86_64.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-08 15:16:43 -08:00
Ulf Magnusson
bd6e04411e kconfig: Clean up header comments and make them consistent
Use this short header style in all Kconfig files:

    # <description>

    # <copyright>
    # <license>

    ...

Also change all <description>s from

    # Kconfig[.extension] - Foo-related options

to just

    # Foo-related options

It's clear enough that it's about Kconfig.

The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)

    git ls-files '*Kconfig*' | \
        xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-04 17:31:27 -05:00
Ulf Magnusson
975de21858 kconfig: Global whitespace/consistency cleanup
Clean up space errors and use a consistent style throughout the Kconfig
files. This makes reading the Kconfig files more distraction-free, helps
with grepping, and encourages the same style getting copied around
everywhere (meaning another pass hopefully won't be needed).

Go for the most common style:

 - Indent properties with a single tab, including for choices.

   Properties on choices work exactly the same syntactically as
   properties on symbols, so not sure how the no-indentation thing
   happened.

 - Indent help texts with a tab followed by two spaces

 - Put a space between 'config' and the symbol name, not a tab. This
   also helps when grepping for definitions.

 - Do '# A comment' instead of '#A comment'

I tweaked Kconfiglib a bit to find most of the stuff.

Some help texts were reflowed to 79 columns with 'gq' in Vim as well,
though not all, because I was afraid I'd accidentally mess up
formatting.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 15:53:23 +01:00
Daniel Leung
b7eb04b300 x86: consolidate x86_64 architecture, SoC and boards
There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.

() Removes the x86_64:x32 architecture and SoC, and replaces
   them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
   qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-10-25 17:57:55 -04:00
Andrew Boie
a41c0d2bf9 qemu_x86_long: enable early console
Useful for debugging.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-15 09:00:49 -07:00
Charles E. Youse
3eb1a8b59a arch/x86: (Intel64) implement SMP support
Add duplicate per-CPU data structures (x86_cpuboot, tss, stacks, etc.)
for up to 4 total CPUs, add code in locore and z_arch_start_cpu().

The test board, qemu_x86_long, now defaults to 2 CPUs.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-10-07 19:46:55 -04:00
Charles E. Youse
8d97750eef arch/x86: (Intel64) add z_arch_curr_cpu() to enable CONFIG_SMP=y
And set qemu_x86_long board to build with CONFIG_SMP=y by default.
Apparently two benchmark tests - latency_measure and sys_kernel -
do not work with the SMP scheduler, so those tests are disabled.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-10-07 19:46:55 -04:00
Charles E. Youse
200056df2f arch/x86: rename CONFIG_X86_MULTIBOOT and related to CONFIG_MULTIBOOT
Simple naming change, since MULTIBOOT is clear enough by itself and
"namespacing" it to X86 is unnecessary and/or inappropriate.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-29 12:30:34 -07:00
Charles E. Youse
1ffab8a5f2 arch/x86: rudimentary ACPI support
Implement a simple ACPI parser with enough functionality to
enumerate CPU cores and determine their local APIC IDs.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-29 12:30:34 -07:00
Kamil Piszczek
a320010e4a boards: x86: qemu_x86: adding nvs capability
Added the NVS capability to the QEMU x86 board description.

Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
2019-09-27 10:06:40 -07:00
Charles E. Youse
e2a0eb0d1c boards/qemu_x86: remove stale flash reference from qemu_x86_long
The QEMU x86 .dts files were re-arranged before long mode was
merged. We don't need this reference to the flash region anymore.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-23 17:50:09 -07:00
Charles E. Youse
34120b9ee5 boards/x86/gpmrb: disable Multiboot header generation
We don't require this to boot with SBL, so disable for now.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-09-21 16:43:26 -07:00