The Adafruit ItsyBitsy M4 express is a small (36 mm x 18 mm) ARM
development board with an onboard RGB LED, USB port, 2 MiB of SPI
flash, and range of I/O broken out onto 23 GPIO pins.
Signed-off-by: Michael Hope <mlhx@google.com>
We only need a 'compatible' entry for the DK,
not the SoC and part-number. This commit fixes
this and aligns the nRF5340 PDK DTS with the
remainder of nRF-based boards.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Conditionalizes csi pinmuxes on CONFIG_VIDEO for all nxp boards
(kinetis, lpc, and imx families) to avoid possible conflicts between
peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Conditionalizes display pinmuxes on CONFIG_DISPLAY for all nxp boards
(kinetis, lpc, and imx families) to avoid possible conflicts between
peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Conditionalizes dac pinmuxes on CONFIG_DAC for all nxp boards (kinetis,
lpc, and imx families) to avoid possible conflicts between peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Conditionalizes can pinmuxes on CONFIG_CAN for all nxp boards (kinetis,
lpc, and imx families) to avoid possible conflicts between peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Conditionalizes ethernet pinmuxes on CONFIG_NET_L2_ETHERNET for all nxp
boards (kinetis, lpc, and imx families) to avoid possible conflicts
between peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Conditionalizes pwm pinmuxes on CONFIG_PWM for all nxp boards (kinetis,
lpc, and imx families) to avoid possible conflicts between peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Conditionalizes adc pinmuxes on CONFIG_ADC for all nxp boards (kinetis,
lpc, and imx families) to avoid possible conflicts between peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Conditionalizes i2c pinmuxes on CONFIG_I2C for all nxp boards (kinetis,
lpc, and imx families) to avoid possible conflicts between peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Conditionalizes spi pinmuxes on CONFIG_SPI for all nxp boards (kinetis,
lpc, and imx families) to avoid possible conflicts between peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Conditionalizes serial pinmuxes on CONFIG_SERIAL for all nxp boards
(kinetis, lpc, and imx families) to avoid possible conflicts between
peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Pins p0.02/p0.03 that were assigned to the i2c1 node are NFC pins.
Use p1.02/p1.03 instead, which are routed to the standard I2C location
in the Arduino header.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
I2C1 used LED pins rather than the ones in the Arduino header
position. SPI2 used Arduino D0 for both SCK and MOSI; replace all
pins with D11-D13 which are the standard location for SPI on the
Arduino header.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Enables the adc instance and pinmux associated with arduino header pin
A2 on the frdm_k82 board. Adds adc to the board yaml to ensure we build
adc samples/tests for this board in CI.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Map Arduino interface to LPCXpresso55S69 pins.
Also tell which SPI interface is used by Arduino.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Map mikroBUS interface to LPCXpresso55S69 pins.
Also tell which SPI interface is used by mikroBUS.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_DISK_ACCESS_STM32_SDMMC flag to for each SDMMC pinmux
configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_I2S flag to for each i2s pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_CAN flag to for each can pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_DAC flag to for each dac pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_ADC flag to for each adc pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_PWM flag to for each pwm pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_I2C flag to for each i2c pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_SPI flag to for each spi pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_SERIAL flag to for each serial pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add an additional check for CONFIG_PWM to decide if pins associated with
LED are configured for GPIO or PWM.
Fixes#25337
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
OpenOCD currently uses a single-bank STM32 configuration for the
B_L072Z_LRWAN1 board. This causes flashing to fail when the firmware
image is larger than the first bank. Switch to the dual bank
configuration to make this work.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Enable icount mode for qemu_cortex_a53 platform, The icount shift
value is selectd based on cpu clock frequency of this platform.
The virtual cpu will execute one instruction every 2^shift ns of
virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_cortex_m3 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_cortex_m0 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Remove the existing qemu icount configuration because icount mode
will be controlled by Kconfig QEMU_ICOUNT so that none suitable
cases(especially networking cases) can exclude icount configuration
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
The length field for the MCUBOOT slot partitions in Nordic platforms
has always had an extra leading zero suggesting it's a 40-bit value,
being stored in a 32-bit field. Remove the incorrect leading zero to
reduce misunderstanding of the field.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:
- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
for macros which are equivalent to
DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name
Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.
This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
