Commit graph

42249 commits

Author SHA1 Message Date
Christian Taedcke 668e359d85 actions: add labeler rule for "platform: SiLabs"
Update labeler action script to apply label for efm32/efr32 mcus.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-07-08 10:48:28 -05:00
Peter Bigot 7da5f15e15 bluetooth: mesh: cdb: fix include files and add language directive
Include the files that provide the types and macros used by the
header.  Ensure that all declarations use C language linkage when
included from a file using C++.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-07-08 16:47:10 +03:00
Peter Bigot 247161dcb9 bluetooth: mesh: access: avoid C99 features unavailable in C++
C99 designated array initializers are not part of the C++ language,
and are not supported in GNU G++.  Replace their use with invocations
of the Zephyr listify macro utility, with ancillary helper functions.

Also fix the initialization order to match declaration order (which
C++ also requires).

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-07-08 16:47:10 +03:00
Peter Bigot 4729e4300f bluetooth: mesh: access: fix initialization order in macros
C++ requires that designated initializers be provided in declaration
order.  Fix the macros that violate this requirement.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-07-08 16:47:10 +03:00
Arnaud Mouiche a7f1e1c399 dts: bindings: Add bindings for ARM M33F
compatible = "arm,cortex-m33f" was already used for some time
(lpc55S6x, nrf9160...) without any related bindings.
Every works fine until you need to access one CPU node property
(eg. clock-frequency)...

Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com>
2020-07-08 13:45:33 +02:00
Andrzej Głąbek 8da1736c67 tests/kernel/gen_isr_table: Add special config for nRF5340 and nRF9160
In nRF9160 and application core in nRF5340, not all interrupts with
highest numbers are implemented. Thus, limit the number of interrupts
reported to the test, so that it does not try to use some unavailable
ones.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-07-08 12:37:58 +02:00
Andy Ross 0e20eafe7a arch/x86: Make sure PCI mmio is initialized before page tables
The page table initialization needs a populated PCI MMIO
configuration, and that is lazy-evaluated.  We aren't guaranteed that
a driver already hit that path, so be sure to call it explicitly.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-08 12:34:09 +02:00
Andy Ross 2626d702c6 arch/x86: zefi must disable HPET before OS handoff
The firmware on existing devices uses HPET timer zero for its own
purposes, and leaves it alive with interrupts enabled.  The Zephyr
driver now knows how to recover from this state with fuller
initialization, but that's not enough to fix the inherent race:

The timer can fire BEFORE the driver initialization happens (and does,
with certain versions of the EFI shell), thus flagging an interrupt to
what Zephyr sees as a garbage vector.  The OS can't fix this on its
own, the EFI bootloader (which is running with interrupts enabled as
part of the EFI environment) has to do it.  Here we can know that our
setting got there in time and didn't result in a stale interrupt flag
in the APIC waiting to blow up when interrupts get enabled.

Note: this is really just a workaround.  It assumes the hardware has
an HPET with a standard address.  Ideally we'd be able to build zefi
using Zephyr kconfig and devicetree values and predicate the HPET
reset on the correct configuraiton.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-08 12:34:09 +02:00
Andy Ross c7d76cbe58 arch/x86: Add a spurious interrupt handler to x86_64
Right now x86_64 doesn't install handlers for vectors that aren't
populated by Zephyr code.  Add a tiny spurious interrupt handler that
logs the error and triggers a fatal error, like other platforms do.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-08 12:34:09 +02:00
Andy Ross f7dd9856ba arch/x86/early_serial: General code cleanup
This patch is almost entirely aesthetics, designed to isolate the
variant configurations to a simple macro API (just IN/OUT), reduce
complexity derived from code pasted out of the larger ns16550 driver,
and keep the complexity out of the (very simple!) core code.  Useful
when hacking on the driver in contexts where it isn't working yet.

The sole behavioral change here is that I've removed the runtime
printk hook installation in favor of defining an
arch_printk_char_out() function which overrides the weak-linked
default (that is, we don't need to install a hook, we can be the
default hook at startup).

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-08 12:34:09 +02:00
Andy Ross d2eca354e8 arch/x86: early_serial cleanup
Various cleanups to the x86 early serial driver, mostly with the goal
of simplifying its deployment during board bringup (which is really
the only reason it exists in the first place):

+ Configure it =y by default.  While there are surely constrained
  environments that will want to disable it, this is a TINY driver,
  and it serves a very important role for niche tasks.  It should be
  built always to make sure it works everywhere.

+ Decouple from devicetree as much as possible.  This code HAS to work
  during board bringup, often with configurations cribbed from other
  machines, before proper configuration gets written.  Experimentally,
  devicetree errors tend to be easy to make, and without a working
  console impossible to diagnose.  Specify the device via integer
  constants in soc.h (in the case of IOPORT access, we already had
  such a symbol) so that the path from what the developer intends to
  what the code executes is as short and obvious as possible.
  Unfortunately I'm not allowed to remove devicetree entirely here,
  but at least a developer adding a new platform will be able to
  override it in an obvious way instead of banging blindly on the
  other side of a DTS compiler.

+ Don't try to probe the PCI device by ID to "verify".  While this
  sounds like a good idea, in practice it's just an extra thing to get
  wrong.  If we bail on our early console because someone (yes, that's
  me) got the bus/device/function right but typoed the VID/DID
  numbers, we're doing no one any favors.

+ Remove the word-sized-I/O feature.  This is a x86 driver for a PCI
  device.  No known PC hardware requires that UART register access be
  done in dword units (in fact doing so would be a violation of the
  PCI specifciation as I understand it).  It looks to have been cut
  and pasted from the ns16550 driver, remove.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-08 12:34:09 +02:00
Andy Ross 662835a798 drivers/serial/ns16550: Unbreak 64 bit MMIO addresses
PCI devices on 64 bit systems can be mapped anywhere, not just in the
lower 4G of memory.  Remove pointer size assumptions.

Also this removes the use of a struct uart_device_config to store the
(runtime) BAR address.  That struct has other stuff in it, and the
only thing we need is the single MMIO address.  It's also REALLY
confusing to have two "devconf" fields in the device storing values of
the same struct type, some fields of which are used from one of them
but some from the other!

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-08 12:34:09 +02:00
Andy Ross 43d84147d9 drivers/pcie: Fix BAR address size limitation
The PCI API was originally limited to 32 bit addresses.  Even though
it had code to skip over the high word in 64 bit BAR entries, it
refused to use it and returned a 32 bit value.  Some devices in the
wild have default mappings from the firmware for devices above 4G.

Also remove the "iobar" API.  It's dead code, we don't call it and we
don't test it.  IO space BAR entries are a legacy feature from way,
way back in PCI history (I genuinely have never heard of a real device
that uses them!).  And there's no difference in format between one of
these and a 32 bit "memory" BAR anyway, someone who actually had this
requirement could just use the existing API without worry.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-08 12:34:09 +02:00
Andy Ross 83464f11e1 sys/sys_io.h: Memory mapped I/O APIs must be pointer-sized, not 32 bit!
The mm_reg_t type used to represent a MMIO address (e.g. in the
sys_write*() APIs) was defined to a uint32_t, which is obviously wrong
on 64 bit systems where devices can be mapped anywhere.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-08 12:34:09 +02:00
Andy Ross 36b8db0129 arch/x86: Map 512G by default when booting x86_64
The default page table (the architecturally required one used for
entrance to long mode, before the OS page tables get assembled) was
mapping the first 4G of memory.

Extend this to 512G by fully populating the second level page table.
We have devices now (up_squared) which have real RAM mapped above 4G.
There's really no good reason not to do this, the page is present
always anyway.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-08 12:34:09 +02:00
Pawel Dunaj af063ccd12 drivers: timer: nrf_rtc: Use correct macro when capping cycles
When checking the absolute value of cycles set to the comparator
use the MAX_CYCLES instead of MAX_TICKS.

The commit changes function names and comments to make it clear
where ticks (system ticks) and where RTC cycles are used.

Fixes #26701

Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
2020-07-08 12:33:08 +02:00
Ioannis Glaropoulos 619a498845 soc: arm: nrf5340: remove DTS nodes for non-functional devices
Several peripherals are non-functional in the ENG_A revision
of nRF5340 (Application MCU) so we delete the corresponding
DTS nodes in the device description.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos c6c978ad19 boards: nrf5340dk_nrf5340: properly choose UARTE pins for Network MCU
When building for nRF5340 Application MCU we need to properly
select which are the default GPIO port/pins for UARTE on the
Network MCU (so we allocate them to Network MCU). These  depend
on the actual version of the board we are using (PDK or DK) so
this commit implements the corresponding conditional logic.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos e684dfa399 boards: arm: nrf5340: enable erratum19 configuration on nRF5340 PDK
When building for nRF5340 PDK board, enable Kconfig option
for Erratum 19. Do not enable when building on nRF5340 DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos ee92112502 boards: arm: nrf5340: add definition for nRF5340 DK
Add the board definition for Nordic
nRF5340 DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos cbc52292b1 boards: arm: nrf5340: rename nRF5340 board definition directory
We rename the nRF5340 board directory to
nrf5340dk_nrf5340 since this will be now
containing board definitions for both the
nRF5340 PDK and DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos f1801fac34 boards: arm: nrf5340: refactor common board Kconfig structure
Refactor the common Kconfig and build files of nRF5340
board definition to enable building for either nRF5340
PDK or DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos 6b93b493ca boards: arm: nrf5340pdk: remove un-needed nrf5340pdk prefix
We do not need to have the nrf5340pdk_ prefix in the
partition configuration and sram planning files for
nrf5340 platforms because these files may be common
for any nrf5340 board variant. Also, we do not need
it in the common .dts header for the Application MCU.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos 6880603e1d dts: arm: nordic: add SoC-variant headers for nrf5340 FP1
Adding SoC variant headers for nRF5340 variant (non Eng A).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos ac9901d5fc dts: arm: nordic: add Eng A suffix to nRF5340 CPUAPP .dtsi headers
Rename the nRF5340 QKAA variant .dtsi headers (Application
MCU) by adding an Engineering A (Eng A) suffix. This is done
to indicate that the headers should be explicitly used when
building for a board that contains the Engineeering A nrf5340
SoC variant.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos 30c9c062d4 dts: arm: nordic: fix compatible strings for nRF5340 MCUs
We need to use CPUAPP and CPUNET instead of CPU0 and CPU1
terminology, because those terms are the ones used
throughout the DeviceTree definitions for nRF5340 SoC.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos 1579246f32 dts: arm: nordic: move number of MPU regions in variant-specific file
Move the definition of the number of MPU regions
(num-mpu-regions) in a SoC variant-specific header
instead of the common .dtsi for nRF5340 Application
MCU. This allows us to define different SoC variants
with different number of MPU regions available.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos 166cfe5fb1 dts: arm: nordic: rename nrf5340_cpuapp_common.dtsi
This commit renames the nrf5340_cpuapp_common.dtsi header
to nrf5340_cpuapp_peripherals.dtsi. This name is more
appropriate, as the header contains DT definitions for
peripherals, accessible from either Secure or Non-secure
execution environment (i.e. not accessible exclusively
by Secure or Non-Secure).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos e65f57bdb1 boards: arm: nrf5340: remove SoC compatibles from board node
We do not need to list the SoC compatibles in the
PDK node definition, this was accidentally left out.
Removing it in this commit.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Michał Narajowski 67ab8a3173 Bluetooth: Mesh: Fix response to Provisioning PDU with invalid type
Reverse the order of these checks because invalid PDU type will
never be expected. If PDU type is invalid we should respond with
error 0x0002 - Invalid format.

Signed-off-by: Michał Narajowski <michal.narajowski@codecoup.pl>
2020-07-08 10:19:02 +02:00
Daniel Leung cbb252adef boards: x86: update build_grub.sh for Python 3
Since Python 2 is already EOL, Linux distributions are starting
to drop support for Python 2. For example, on Ubuntu 20.04,
"python" is no longer available. This breaks the bootstrap
and autogen.sh as they are both default to executing "python".
Fix this by setting the PYTHON environment variable before
building so both scripts will use python3 instead.

Also update git checkout to grab the official 2.04 release.

Fixes #25398

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-07-07 22:14:16 -04:00
Flavio Ceolin b7d27b94df doc: security: Avoid confusion with code guideline
Security documentation contains a code guideline section that is more
about security principles than code guidelines itself. Just removing
the mention do code guideline to avoid possible confusions with
upcoming project code guideline based on MISRA-C.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-07-07 19:29:21 -04:00
Emil Obalski 4f42b4413b usb: Correct logging level in Audio class.
Configuration file was left unchanged after development
of USB Audio class. Deleted configs should never be present.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
2020-07-07 19:28:14 -04:00
Peter Bigot e37c785356 kernel: fix timer initializer field order
Recent changes to struct _timeout changed the declaration order to
avoid alignment padding.  While this has no effect to C99 code C++
requires that designated initializes appear in declaration order.
Update the initializer macro so it can be used in C++ code.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-07-07 19:27:32 -04:00
Anas Nashif 869ca055c5 sanitycheck: handle qemu crashes
Deal with qemu crashes and do not register pass status as the default.
In case we do not have a status, report unknown.

This now captures different states from qemu that were not captured
before.

Fixes #26679

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-07-07 16:04:32 -07:00
Simon Glass b15bec5a2a drivers: flash: flash_simulator: Erase flash first
With native_posix, a flash.bin file is created when running the tests.
If the tests are re-run, they fail since the flash is no-longer erased.

Before running the tests, erase the flash so that the 'read' test can
work regardless of the previous state.

Fixes: 25171
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-07 17:19:26 -04:00
Simon Glass 740b99c937 tests: shell: shell_flash: Add a test for 'flash read'
Add a simple test for this command to check that the output is as
expected.

This requires a larger output buffer in shell_dummy, so update that
too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-07 17:19:26 -04:00
Simon Glass 9ff7dfce23 flash: Enhance 'flash read' to read a block of data
It is annoying to read just a single word at a time. Update this
command to print any amount of data. This uses byte format at present.

We could perhaps support something like:

   flash read.8
   flash read.16
   flash read.32

to chose the size.

Example output (with line breaks to keep within git-style limit):

$ flash read FLASH_CTRL 0 20
00000000: 20 25 00 20 1d 26 00 08  69 68 00 08 45 26 00 08
   | %. .&.. ih..E&..|
00000010: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00
   |........ ........|

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-07 17:19:26 -04:00
Simon Glass 84e9c7c63d shell: Export shell_hexdump_line()
This function is useful for other code. Export it along with the
default line length in bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-07 17:19:26 -04:00
Simon Glass fecdb93c49 drivers: flash: flash_simulator: Fix 'succedd' typo
Fix the 'succedd' typo which is in lots of places in this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-07 17:19:26 -04:00
Erwan Gouriou 2339fa00f3 scripts: sanitylib.py: Add support for STLINK-V3 probe
Recent ST boards embed the new ST-Link probe V3.
It is advertised as "STLINK-V3", update sanitylmib to take it
into account.
In handle function, it is proposed to treat it separately as current
"STM32 STLink" as processing might differ in next future (hla_serial
deprecation).

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-07-07 16:41:09 -04:00
Krzysztof Chruscinski 157f6f65d9 drivers: sensor: nrf5: temp_nrf5: Add mutex to temp_nrf5_sample_fetch
Added mutex to protect against access from various contexts.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-07-07 16:27:32 -04:00
Alexey Markevich 2d8e71ba0c samples: net: google_iot_mqtt: fix CONFIG_CLOUD_CLIENT_ID value
According to
https://cloud.google.com/iot/docs/how-tos/mqtt-bridge#configuring_mqtt_clients
MQTT client ID format.

Signed-off-by: Alexey Markevich <buhhunyx@gmail.com>
2020-07-07 16:26:51 -04:00
Peter Bigot dc14becd2d drivers: flash: nrf_qspi_nor: record dependency on multithreading
This driver blocks on a semaphore to receive notification when an
operation is complete, so requires CONFIG_MULTITHREADING=y.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-07-07 16:24:38 -04:00
Marcin Niestroj e2e2a2bd94 net: http_client: add missing kernel.h include statement
There is following error when compiling applications using http_client:

  /zephyr/include/net/http_client.h:157:24: error: field 'work' has \
  incomplete type
    157 |  struct k_delayed_work work;
        |                        ^~~~
  /zephyr/include/net/http_client.h:177:2: error: unknown type name \
  'k_timeout_t'
    177 |  k_timeout_t timeout;
        |  ^~~~~~~~~~~

Fix that by adding missing kernel.h include statement in http_client.h.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-07-07 16:00:42 -04:00
Maureen Helm 4e39938942 actions: Add label for nxp boards, drivers, socs
Extends the github labeling action to automatically add the nxp label to
nxp-related boards, drivers, and socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-07-07 13:01:37 -04:00
Andy Ross fdba8be777 tests/kernel/smp: Fixup IPI test
This test was written to assume that the only IPI handled would be the
one generated by the test, but the scheduler also generates an IPI any
time a thread becomes runnable, and there's no way to lock that out in
an SMP system where the other CPU is going to be doing its own thing
(we can't use "1cpu" because that locks interrupts on the other CPU
and obviously this is a test of an interrupt).

Change the logic to detect that "at least one IPI was received", which
is fine for coverage.  Really a better place for a test like this
would have been tests/kernel/mp, which is a test of the lower level
APIs and runs the other CPU deterministically (i.e. not under the
control of the Zephyr scheduler).

Also some misc fixes:

* Don't busy wait at the start, that's needless.

* Sleep instead of busywaiting after sending the IPI, spinning isn't
  needed here and acts to increase CI load needlessly.

* Declare the cross thread signal variable volatile for correctness
  (though this error seems to have been benign in practice).

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-07 12:59:33 -04:00
Andy Ross 4d5e67ed13 arch/x86: Unbreak SMP startup on x86_64
A last minute "cleanup" to the EFI startup path (on a system where I
had SMP disabled) moved the load of the x86_cpuboot[0] entry into RBP
into the main startup code, which is wrong because on auxiliary CPUs
that's already set up by the 16/32 bit entry code to point to the
OTHER entries.

Put it back where it belongs.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-07-07 12:59:33 -04:00
Watson Zeng 85acfd2e27 arch: arc: irq: bugs fix for fast irq in one register bank config
* The stack pointer (SP) register points to the lowest-used address of
   a downward-growing stack, so memory address [sp] is used, we can't
   modify it.

* In firq_no_switch case, we need to pop sp, which pushed before
   _isr_demux function in firq_nest function.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2020-07-07 15:10:26 +02:00
Wayne Ren a3a5c72d9b tests: filter out nsim as it's slow
nsim is slow, if the MEMSZ is too targe, the test will
run a long time and make sanitycheck timeout.

There are two possible fixes to pass the sanitycheck test
  * filter out nsim, not to block the sanitcheck test
  * use a small MEMSZ for nsim to reduce the execution time.

Considering there are potential improvements for nsim (because
some qemu targets can pass), we use the 1st fix to pass the
sanitycheck temporarily.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-07-07 15:09:34 +02:00