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boards: arm: rcar_h3ulcb: add pins definition

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Add some pins definitions for CAN0 and SCIF1/2.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
This commit is contained in:
Julien Massot 2022-01-14 09:04:28 +01:00 • committed by Carles Cufí
commit ee91ae5a21
2 changed files with 36 additions and 0 deletions
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33
boards/arm/rcar_h3ulcb/rcar_h3ulcb_cr7-pinctrl.dtsi Normal file
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@ -0,0 +1,33 @@
/*
* Copyright (c) 2022 IoT.bzh
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/renesas/pinctrl-r8a77951.h>
&pfc {
can0_data_a_tx_default: can0_data_a_tx_default {
pin = <PIN_RD FUNC_CAN0_TX_A>;
};
can0_data_a_rx_default: can0_data_a_rx_default {
pin = <PIN_RD_WR FUNC_CAN0_RX_A>;
};
scif1_data_a_tx_default: scif1_data_a_tx_default {
pin = <PIN_TX1_A FUNC_TX1_A>;
};
scif1_data_a_rx_default: scif1_data_a_rx_default {
pin = <PIN_RX1_A FUNC_RX1_A>;
};
scif2_data_a_tx_default: scif2_data_a_tx_default {
pin = <PIN_TX2_A FUNC_TX2_A>;
};
scif2_data_a_rx_default: scif2_data_a_rx_default {
pin = <PIN_RX2_A FUNC_RX2_A>;
};
};

3
boards/arm/rcar_h3ulcb/rcar_h3ulcb_cr7.dts
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@ -7,6 +7,7 @@
/dts-v1/; /dts-v1/;
#include <arm/renesas/gen3/r8a77951.dtsi> #include <arm/renesas/gen3/r8a77951.dtsi>
#include "rcar_h3ulcb_cr7-pinctrl.dtsi"
/ { / {
model = "Renesas h3ulcb board"; model = "Renesas h3ulcb board";
@ -51,6 +52,8 @@
}; };
&can0 { &can0 {
pinctrl-0 = <&can0_data_a_tx_default &can0_data_a_rx_default>;
pinctrl-names = "default";
status = "okay"; status = "okay";
}; };