diff --git a/boards/arm/rcar_h3ulcb/rcar_h3ulcb_cr7-pinctrl.dtsi b/boards/arm/rcar_h3ulcb/rcar_h3ulcb_cr7-pinctrl.dtsi
new file mode 100644
index 00000000000..a963552b605
--- /dev/null
+++ b/boards/arm/rcar_h3ulcb/rcar_h3ulcb_cr7-pinctrl.dtsi
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2022 IoT.bzh
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/pinctrl/renesas/pinctrl-r8a77951.h>
+
+&pfc {
+	can0_data_a_tx_default: can0_data_a_tx_default {
+		pin = <PIN_RD FUNC_CAN0_TX_A>;
+	};
+
+	can0_data_a_rx_default: can0_data_a_rx_default {
+		pin = <PIN_RD_WR FUNC_CAN0_RX_A>;
+	};
+
+	scif1_data_a_tx_default: scif1_data_a_tx_default {
+		pin = <PIN_TX1_A FUNC_TX1_A>;
+	};
+
+	scif1_data_a_rx_default: scif1_data_a_rx_default {
+		pin = <PIN_RX1_A FUNC_RX1_A>;
+	};
+
+	scif2_data_a_tx_default: scif2_data_a_tx_default {
+		pin = <PIN_TX2_A FUNC_TX2_A>;
+	};
+
+	scif2_data_a_rx_default: scif2_data_a_rx_default {
+		pin = <PIN_RX2_A FUNC_RX2_A>;
+	};
+};
diff --git a/boards/arm/rcar_h3ulcb/rcar_h3ulcb_cr7.dts b/boards/arm/rcar_h3ulcb/rcar_h3ulcb_cr7.dts
index b2e0d0e291f..7a32384e01e 100644
--- a/boards/arm/rcar_h3ulcb/rcar_h3ulcb_cr7.dts
+++ b/boards/arm/rcar_h3ulcb/rcar_h3ulcb_cr7.dts
@@ -7,6 +7,7 @@
 
 /dts-v1/;
 #include <arm/renesas/gen3/r8a77951.dtsi>
+#include "rcar_h3ulcb_cr7-pinctrl.dtsi"
 
 / {
 	model = "Renesas h3ulcb board";
@@ -51,6 +52,8 @@
 };
 
 &can0 {
+	pinctrl-0 = <&can0_data_a_tx_default &can0_data_a_rx_default>;
+	pinctrl-names = "default";
 	status = "okay";
 };