michaelh/zephyr
1
0
Fork 0
Code Releases Activity

soc: remove unnecessary inclusions of devicetree.h

Browse source 
Many ARM SoCs included <devicetree.h> likely due to:

1. nvic.h not being self-contained
2. As a result of copy-paste

Some RISC-V SoCs had the same problem, in this case likely due to
copy-paste from ARM. The <devicetree.h> header has been removed using
the following command:

sed -i ':a;N;$!ba;s/#include <devicetree\.h>\n//g' soc/**/soc.h

soc.h files that make a legitimate usage of the API have not been
changed.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2022-01-03 16:43:09 +01:00 • committed by Carles Cufí
commit e5e73a70e9
59 changed files with 0 additions and 96 deletions
Download patch file Download diff file Expand all files Collapse all files

2
soc/arm/arm/beetle/soc.h
View file

@ -95,8 +95,6 @@
#ifndef _ASMLANGUAGE
/* Add include for DTS generated information */
#include <devicetree.h>
#include "soc_pins.h"
#include "soc_power.h"

1
soc/arm/arm/designstart/soc.h
View file

@ -7,7 +7,6 @@
#ifndef _SOC_H_
#define _SOC_H_
#include <devicetree.h>
#define __MPU_PRESENT CONFIG_CPU_HAS_ARM_MPU

1
soc/arm/arm/mps2/soc.h
View file

@ -16,7 +16,6 @@
#endif
#include <devicetree.h>
#include <soc_registers.h>
extern void wakeup_cpu1(void);

1
soc/arm/arm/mps3/soc.h
View file

@ -17,6 +17,5 @@
#define __MVE_FP 1U /* MVE floating point present */
#endif
#include <devicetree.h>
#endif /* _SOC_H_ */

1
soc/arm/arm/musca_b1/soc.h
View file

@ -9,7 +9,6 @@
#ifndef _ASMLANGUAGE
#include "system_cmsdk_musca_b1.h"
#include <devicetree.h>
#include <sys/util.h>
#endif

1
soc/arm/arm/musca_s1/soc.h
View file

@ -9,7 +9,6 @@
#ifndef _ASMLANGUAGE
#include "system_cmsdk_musca_s1.h"
#include <devicetree.h>
#include <sys/util.h>
#endif

2
soc/arm/atmel_sam/sam3x/soc.h
View file

@ -17,8 +17,6 @@
#ifndef _ASMLANGUAGE
/* Add include for DTS generated information */
#include <devicetree.h>
#define DONT_USE_CMSIS_INIT
#define DONT_USE_PREDEFINED_CORE_HANDLERS

2
soc/arm/atmel_sam/sam4e/soc.h
View file

@ -19,8 +19,6 @@
#ifndef _ASMLANGUAGE
/* Add include for DTS generated information */
#include <devicetree.h>
#define DONT_USE_CMSIS_INIT
#define DONT_USE_PREDEFINED_CORE_HANDLERS

2
soc/arm/atmel_sam/sam4s/soc.h
View file

@ -19,8 +19,6 @@
#ifndef _ASMLANGUAGE
/* Add include for DTS generated information */
#include <devicetree.h>
#define DONT_USE_CMSIS_INIT
#define DONT_USE_PREDEFINED_CORE_HANDLERS

2
soc/arm/atmel_sam/same70/soc.h
View file

@ -17,8 +17,6 @@
#ifndef _ASMLANGUAGE
/* Add include for DTS generated information */
#include <devicetree.h>
#define DONT_USE_CMSIS_INIT
#define DONT_USE_PREDEFINED_CORE_HANDLERS

2
soc/arm/atmel_sam/samv71/soc.h
View file

@ -18,8 +18,6 @@
#ifndef _ASMLANGUAGE
/* Add include for DTS generated information */
#include <devicetree.h>
#define DONT_USE_CMSIS_INIT
#define DONT_USE_PREDEFINED_CORE_HANDLERS

2
soc/arm/atmel_sam0/samd20/soc.h
View file

@ -13,8 +13,6 @@
#include <zephyr/types.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#if defined(CONFIG_SOC_PART_NUMBER_SAMD20E14)
#include <samd20e14.h>

2
soc/arm/atmel_sam0/samd21/soc.h
View file

@ -13,8 +13,6 @@
#include <zephyr/types.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#if defined(CONFIG_SOC_PART_NUMBER_SAMD21E15A)
#include <samd21e15a.h>

2
soc/arm/atmel_sam0/samd51/soc.h
View file

@ -13,8 +13,6 @@
#include <zephyr/types.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#if defined(CONFIG_SOC_PART_NUMBER_SAMD51G18A)
#include <samd51g18a.h>

2
soc/arm/atmel_sam0/same51/soc.h
View file

@ -13,8 +13,6 @@
#include <zephyr/types.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#if defined(CONFIG_SOC_PART_NUMBER_SAME51J18A)
#include <same51j18a.h>

2
soc/arm/atmel_sam0/same53/soc.h
View file

@ -13,8 +13,6 @@
#include <zephyr/types.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#if defined(CONFIG_SOC_PART_NUMBER_SAME53J18A)
#include <same53j18a.h>

2
soc/arm/atmel_sam0/same54/soc.h
View file

@ -13,8 +13,6 @@
#include <zephyr/types.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#if defined(CONFIG_SOC_PART_NUMBER_SAME54N19A)
#include <same54n19a.h>

2
soc/arm/atmel_sam0/samr21/soc.h
View file

@ -13,8 +13,6 @@
#include <zephyr/types.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#if defined(CONFIG_SOC_PART_NUMBER_SAMR21E16A)
#include <samr21e16a.h>

1
soc/arm/bcm_vk/valkyrie/soc.h
View file

@ -11,7 +11,6 @@
#ifndef _ASMLANGUAGE
#include <devicetree.h>
/* Interrupt Number Definition */
typedef enum IRQn {

1
soc/arm/bcm_vk/viper/soc.h
View file

@ -12,7 +12,6 @@
#ifndef _ASMLANGUAGE
#include <devicetree.h>
/* Interrupt Number Definition */
typedef enum IRQn {

2
soc/arm/cypress/psoc6/soc.h
View file

@ -19,8 +19,6 @@
#ifndef _ASMLANGUAGE
/* Add include for DTS generated information */
#include <devicetree.h>
#include <cy_device_headers.h>

1
soc/arm/gigadevice/gd32f3x0/soc.h
View file

@ -8,7 +8,6 @@
#ifndef _ASMLANGUAGE
#include <devicetree.h>
#include <gd32f3x0.h>
#endif /* _ASMLANGUAGE */

1
soc/arm/gigadevice/gd32f403/soc.h
View file

@ -13,7 +13,6 @@
#include <sys/util.h>
#ifndef _ASMLANGUAGE
#include <devicetree.h>
#include <gd32f403.h>
#endif /* !_ASMLANGUAGE */

1
soc/arm/gigadevice/gd32f4xx/soc.h
View file

@ -8,7 +8,6 @@
#ifndef _ASMLANGUAGE
#include <devicetree.h>
#include <gd32f4xx.h>
#endif /* _ASMLANGUAGE */

2
soc/arm/infineon_xmc/4xxx/soc.h
View file

@ -6,7 +6,5 @@
*
*/
/* Add include for DTS generated information */
#include <devicetree.h>
#include <system_XMC4500.h>
#include <XMC4500.h>

2
soc/arm/nuvoton_npcx/npcx7/soc.h
View file

@ -11,8 +11,6 @@
#define __FPU_PRESENT CONFIG_CPU_HAS_FPU
#define __MPU_PRESENT CONFIG_CPU_HAS_ARM_MPU
/* Add include for DTS generated information */
#include <devicetree.h>
#include <reg/reg_access.h>
#include <reg/reg_def.h>

2
soc/arm/nuvoton_npcx/npcx9/soc.h
View file

@ -11,8 +11,6 @@
#define __FPU_PRESENT CONFIG_CPU_HAS_FPU
#define __MPU_PRESENT CONFIG_CPU_HAS_ARM_MPU
/* Add include for DTS generated information */
#include <devicetree.h>
#include <reg/reg_access.h>
#include <reg/reg_def.h>

1
soc/arm/nuvoton_numicro/m48x/soc.h
View file

@ -9,7 +9,6 @@
#define ZEPHYR_SOC_ARM_NUVOTON_M48X_SOC_H_
#include <sys/util.h>
#include <devicetree.h>
#include <NuMicro.h>
#endif /* ZEPHYR_SOC_ARM_NUVOTON_M48X_SOC_H_*/

2
soc/arm/nxp_imx/mimx8ml8_m7/soc.h
View file

@ -13,8 +13,6 @@ extern "C" {
#ifndef _ASMLANGUAGE
/* Add include for DTS generated information */
#include <devicetree.h>
#include <fsl_device_registers.h>

2
soc/arm/nxp_kinetis/k6x/soc.h
View file

@ -25,8 +25,6 @@
#include <fsl_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

2
soc/arm/nxp_kinetis/k8x/soc.h
View file

@ -17,8 +17,6 @@ extern "C" {
#include <fsl_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

2
soc/arm/nxp_kinetis/ke1xf/soc.h
View file

@ -13,8 +13,6 @@
#include <fsl_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

2
soc/arm/nxp_kinetis/kl2x/soc.h
View file

@ -15,8 +15,6 @@
#include <fsl_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

2
soc/arm/nxp_kinetis/kv5x/soc.h
View file

@ -17,8 +17,6 @@ extern "C" {
#include <fsl_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

2
soc/arm/nxp_kinetis/kwx/soc.h
View file

@ -26,8 +26,6 @@
#include <fsl_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

2
soc/arm/nxp_lpc/lpc11u6x/soc.h
View file

@ -18,8 +18,6 @@
#ifndef _ASMLANGUAGE
#include <sys/util.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

2
soc/arm/nxp_lpc/lpc54xxx/soc.h
View file

@ -19,8 +19,6 @@
#include <sys/util.h>
#include <fsl_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

2
soc/arm/nxp_lpc/lpc55xxx/soc.h
View file

@ -19,8 +19,6 @@
#include <sys/util.h>
#include <fsl_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

1
soc/arm/quicklogic_eos_s3/soc.h
View file

@ -9,7 +9,6 @@
#include <sys/util.h>
#include <eoss3_dev.h>
#include <devicetree.h>
/* Available frequencies */
#define HSOSC_1MHZ 1024000

2
soc/arm/silabs_exx32/efm32gg11b/soc.h
View file

@ -25,8 +25,6 @@ extern "C" {
#include <em_bus.h>
#include <em_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"

2
soc/arm/silabs_exx32/efm32jg12b/soc.h
View file

@ -20,8 +20,6 @@
#include <em_bus.h>
#include <em_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"

2
soc/arm/silabs_exx32/efm32pg12b/soc.h
View file

@ -20,8 +20,6 @@
#include <em_bus.h>
#include <em_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"

2
soc/arm/silabs_exx32/efm32pg1b/soc.h
View file

@ -20,8 +20,6 @@
#include <em_bus.h>
#include <em_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"

2
soc/arm/silabs_exx32/efm32wg/soc.h
View file

@ -20,8 +20,6 @@
#include <em_bus.h>
#include <em_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"

2
soc/arm/silabs_exx32/efr32bg13p/soc.h
View file

@ -22,8 +22,6 @@
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

2
soc/arm/silabs_exx32/efr32fg13p/soc.h
View file

@ -20,8 +20,6 @@
#include <em_bus.h>
#include <em_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"

2
soc/arm/silabs_exx32/efr32fg1p/soc.h
View file

@ -20,8 +20,6 @@
#include <em_bus.h>
#include <em_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"

2
soc/arm/silabs_exx32/efr32mg12p/soc.h
View file

@ -19,8 +19,6 @@
#include <em_common.h>
/* Add include for DTS generated information */
#include <devicetree.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"

2
soc/arm/silabs_exx32/efr32mg21/soc.h
View file

@ -22,8 +22,6 @@
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"
/* Add include for DTS generated information */
#include <devicetree.h>
#endif /* !_ASMLANGUAGE */

1
soc/arm64/arm/fvp_aemv8r/soc.h
View file

@ -6,6 +6,5 @@
#ifndef _SOC_H_
#define _SOC_H_
#include <devicetree.h>
#endif /* _SOC_H_ */

1
soc/arm64/nxp_layerscape/ls1046a/soc.h
View file

@ -11,7 +11,6 @@
#include <toolchain.h>
#ifndef _ASMLANGUAGE
#include <devicetree.h>
#endif /* _ASMLANGUAGE */
#define UART_REG_ADDR_INTERVAL 1

1
soc/riscv/riscv-ite/it8xxx2/soc.h
View file

@ -7,7 +7,6 @@
*
*/
#include <soc_common.h>
#include <devicetree.h>
#define UART_REG_ADDR_INTERVAL 1

1
soc/riscv/riscv-privilege/andes_v5/ae350/soc.h
View file

@ -12,7 +12,6 @@
#define __RISCV_ANDES_AE350_SOC_H_
#include <soc_common.h>
#include <devicetree.h>
/* Machine timer memory-mapped registers */
#define RISCV_MTIME_BASE 0xE6000000

1
soc/riscv/riscv-privilege/miv/soc.h
View file

@ -5,7 +5,6 @@
#define __RISCV32_MIV_SOC_H_
#include <soc_common.h>
#include <devicetree.h>
/* GPIO Interrupts */
#define MIV_GPIO_0_IRQ (0)

1
soc/riscv/riscv-privilege/neorv32/soc.h
View file

@ -8,7 +8,6 @@
#define RISCV_NEORV32_SOC_H
#include <soc_common.h>
#include <devicetree.h>
/* Machine System Timer (MTIME) registers */
#define RISCV_MTIME_BASE 0xffffff90U

1
soc/riscv/riscv-privilege/sifive-freedom/soc.h
View file

@ -12,7 +12,6 @@
#define __RISCV_SIFIVE_FREEDOM_SOC_H_
#include <soc_common.h>
#include <devicetree.h>
#if defined(CONFIG_SOC_RISCV_SIFIVE_FREEDOM)

1
soc/riscv/riscv-privilege/starfive_jh71xx/soc.h
View file

@ -8,7 +8,6 @@
#define __RISCV_VIRT_SOC_H_
#include <soc_common.h>
#include <devicetree.h>
#define RISCV_MTIME_BASE 0x0200BFF8
#define RISCV_MTIMECMP_BASE 0x02004000

1
soc/riscv/riscv-privilege/telink_b91/soc.h
View file

@ -8,7 +8,6 @@
#define RISCV_TELINK_B91_SOC_H
#include <soc_common.h>
#include <devicetree.h>
/* Machine timer memory-mapped registers */
#define RISCV_MTIME_BASE 0xE6000000

1
soc/riscv/riscv-privilege/virt/soc.h
View file

@ -8,7 +8,6 @@
#define __RISCV_VIRT_SOC_H_
#include <soc_common.h>
#include <devicetree.h>
#define SIFIVE_SYSCON_TEST 0x00100000
#define RISCV_MTIME_BASE 0x0200BFF8