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Revert "arm: cypress/psoc6: add SoC specific linker input sections"

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This reverts commit 08c165f2b0.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2018-10-14 09:41:03 -04:00
commit a220e2690f
4 changed files with 0 additions and 26 deletions
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2
include/arch/arm/cortex_m/scripts/linker.ld
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@ -114,8 +114,6 @@ SECTIONS
KEEP(*(IRQ_VECTOR_TABLE)) KEEP(*(IRQ_VECTOR_TABLE))
KEEP(*(.vectors))
KEEP(*(.openocd_dbg)) KEEP(*(.openocd_dbg))
KEEP(*(".openocd_dbg.*")) KEEP(*(".openocd_dbg.*"))

2
soc/arm/cypress/psoc6/Kconfig.series
View file

@ -11,7 +11,5 @@ config SOC_SERIES_PSOC62
select SYS_POWER_LOW_POWER_STATE_SUPPORTED select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select CPU_HAS_SYSTICK select CPU_HAS_SYSTICK
select HAS_CYPRESS_DRIVERS select HAS_CYPRESS_DRIVERS
select SOC_NOINIT_LD
select SOC_RWDATA_LD
help help
Enable support for Cypress PSoC6 MCU series Enable support for Cypress PSoC6 MCU series

16
soc/arm/cypress/psoc6/soc-noinit.ld
View file

@ -1,16 +0,0 @@
/*
* Extracted from:
* ext/hal/cypress/.../devices/psoc6/linker/gcc/cy8c6xx6_cm0plus.ld
*
* Size of sections are calculated in the startup scripts,
* so they don't have to be specified here.
*/
. = ALIGN(8);
KEEP(*(.ram_vectors))
. = ALIGN(4);
KEEP(*(.heap))
. = ALIGN(4);
KEEP(*(.stack))

6
soc/arm/cypress/psoc6/soc-rwdata.ld
View file

@ -1,6 +0,0 @@
/*
* Extracted from:
* ext/hal/cypress/.../devices/psoc6/linker/gcc/cy8c6xx6_cm0plus.ld
*/
KEEP(*(.cy_ramfunc))