michaelh/zephyr
1
0
Fork 0
Code Releases Activity

Revert "linker: warn about orphan sections"

Browse source 
This reverts commit 8ce758a8ff.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2018-10-14 09:41:02 -04:00
commit 0d4b5daeaa
25 changed files with 0 additions and 397 deletions
Download patch file Download diff file Expand all files Collapse all files

7
CMakeLists.txt
View file

@ -287,13 +287,6 @@ zephyr_ld_options(
${LINKERFLAGPREFIX},--build-id=none
)
# Funny thing is if this is set to =error, some architectures will
# skip this flag even though the compiler flag check passes
# (e.g. ARC and Xtensa). So keep it at =warn, for now.
zephyr_ld_options(
${LINKERFLAGPREFIX},--orphan-handling=warn
)
if(CONFIG_HAVE_CUSTOM_LINKER_SCRIPT)
set(LINKER_SCRIPT ${APPLICATION_SOURCE_DIR}/${CONFIG_CUSTOM_LINKER_SCRIPT})
if(NOT EXISTS ${LINKER_SCRIPT})

6
include/arch/arc/v2/linker.ld
View file

@ -73,9 +73,6 @@ MEMORY {
}
SECTIONS {
#include <linker/rel-sections.ld>
GROUP_START(ROMABLE_REGION)
SECTION_PROLOGUE(_TEXT_SECTION_NAME,,ALIGN(1024)) {
@ -286,7 +283,4 @@ SECTIONS {
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
#include <linker/debug-sections.ld>
}

45
include/arch/arm/cortex_m/scripts/linker.ld
View file

@ -87,23 +87,6 @@ ENTRY(CONFIG_KERNEL_ENTRY)
SECTIONS
{
#include <linker/rel-sections.ld>
/*
* .plt and .iplt are here according to 'arm-zephyr-elf-ld --verbose',
* before text section.
*/
SECTION_PROLOGUE(.plt,,)
{
*(.plt)
}
SECTION_PROLOGUE(.iplt,,)
{
*(.iplt)
}
GROUP_START(ROMABLE_REGION)
_image_rom_start = ROM_ADDR;
@ -150,12 +133,6 @@ SECTIONS
*(".text.*")
*(.gnu.linkonce.t.*)
/*
* These are here according to 'arm-zephyr-elf-ld --verbose',
* after .gnu.linkonce.t.*
*/
*(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
#include <linker/priv_stacks-text.ld>
#include <linker/kobject-text.ld>
@ -242,18 +219,6 @@ SECTIONS
} > FLASH_CCFG
#endif
/*
* These are here according to 'arm-zephyr-elf-ld --verbose',
* before data section.
*/
SECTION_PROLOGUE(.got,,)
{
*(.got.plt)
*(.igot.plt)
*(.got)
*(.igot)
}
GROUP_START(RAMABLE_REGION)
@ -354,8 +319,6 @@ SECTIONS
KERNEL_INPUT_SECTION(COMMON)
*(".kernel_bss.*")
#include <linker/priv_stacks-noinit.ld>
/*
* As memory is cleared in words only, it is simpler to ensure the BSS
* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
@ -464,12 +427,4 @@ SECTIONS
#include <linker/intlist.ld>
#endif
#include <linker/debug-sections.ld>
SECTION_PROLOGUE(.ARM.attributes, 0,)
{
KEEP(*(.ARM.attributes))
KEEP(*(.gnu.attributes))
}
}

19
include/arch/nios2/linker.ld
View file

@ -82,23 +82,6 @@ ENTRY(CONFIG_KERNEL_ENTRY)
SECTIONS
{
#include <linker/rel-sections.ld>
/*
* .plt and .iplt are here according to
* 'nios2-zephyr-elf-ld --verbose', before text section.
*/
SECTION_PROLOGUE(.plt,,)
{
*(.plt)
}
SECTION_PROLOGUE(.iplt,,)
{
*(.iplt)
}
GROUP_START(ROMABLE_REGION)
_image_rom_start = _ROM_ADDR;
@ -278,7 +261,5 @@ SECTIONS
#include <linker/intlist.ld>
#endif
#include <linker/debug-sections.ld>
}

27
include/arch/posix/linker.ld
View file

@ -21,43 +21,16 @@
#include <linker/linker-defs.h>
#include <linker/linker-tool.h>
SECTIONS
{
SECTION_PROLOGUE(.note.ABI-tag,,)
{
*(.note.ABI-tag)
}
} INSERT AFTER .interp;
SECTIONS
{
#include <linker/rel-sections.ld>
#include <linker/common-rom.ld>
#include <linker/common-ram.ld>
SECTION_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD OPTIONAL),)
{
/*
* This section is used for non-initialized objects that
* will not be cleared during the boot process.
*/
KERNEL_INPUT_SECTION(.noinit)
KERNEL_INPUT_SECTION(".noinit.*")
*(".kernel_noinit.*")
}
#include <arch/posix/native_tasks.ld>
/* Related to transactional memory */
SECTION_PROLOGUE(.tm_clone_table,,)
{
*(.tm_clone_table)
}
__data_ram_end = .;
} INSERT AFTER .data;

19
include/arch/riscv32/common/linker.ld
View file

@ -46,22 +46,6 @@ ENTRY(CONFIG_KERNEL_ENTRY)
SECTIONS
{
#include <linker/rel-sections.ld>
/*
* The .plt and .iplt are here according to
* 'riscv32-zephyr-elf-ld --verbose', before text section.
*/
SECTION_PROLOGUE(.plt,,)
{
*(.plt)
}
SECTION_PROLOGUE(.iplt,,)
{
*(.iplt)
}
GROUP_START(ROM)
_image_rom_start = .;
@ -191,7 +175,4 @@ SECTIONS
#endif
GROUP_END(RAMABLE_REGION)
#include <linker/debug-sections.ld>
}

21
include/arch/riscv32/pulpino/linker.ld
View file

@ -41,23 +41,6 @@ ENTRY(CONFIG_KERNEL_ENTRY)
SECTIONS
{
#include <linker/rel-sections.ld>
/*
* .plt and .iplt are here according to
* 'riscv32-zephyr-elf-ld --verbose', before text section.
*/
SECTION_PROLOGUE(.plt,,)
{
*(.plt)
}
SECTION_PROLOGUE(.iplt,,)
{
*(.iplt)
}
GROUP_START(INSTRRAM)
SECTION_PROLOGUE(_VECTOR_SECTION_NAME,,)
@ -88,7 +71,6 @@ SECTIONS
*(.text)
*(".text.*")
*(.gnu.linkonce.t.*)
*(.eh_frame)
} GROUP_LINK_IN(INSTRRAM)
_image_text_end = .;
@ -178,7 +160,4 @@ SECTIONS
#endif
GROUP_END(RAMABLE_REGION)
#include <linker/debug-sections.ld>
}

5
include/arch/x86/linker.ld
View file

@ -66,9 +66,6 @@ ENTRY(CONFIG_KERNEL_ENTRY)
/* SECTIONS definitions */
SECTIONS
{
#include <linker/rel-sections.ld>
GROUP_START(ROMABLE_REGION)
#ifdef CONFIG_REALMODE
/* 16-bit sections */
@ -381,8 +378,6 @@ SECTIONS
#include <custom-sections.ld>
#endif
#include <linker/debug-sections.ld>
}
#ifdef CONFIG_XIP

40
include/linker/debug-sections.ld
View file

@ -1,40 +0,0 @@
/* following sections are obtained via 'ld --verbose' */
/* Stabs debugging sections. */
SECTION_PROLOGUE(.stab, 0,) { *(.stab) }
SECTION_PROLOGUE(.stabstr, 0,) { *(.stabstr) }
SECTION_PROLOGUE(.stab.excl, 0,) { *(.stab.excl) }
SECTION_PROLOGUE(.stab.exclstr, 0,) { *(.stab.exclstr) }
SECTION_PROLOGUE(.stab.index, 0,) { *(.stab.index) }
SECTION_PROLOGUE(.stab.indexstr, 0,) { *(.stab.indexstr) }
SECTION_PROLOGUE(.comment, 0,) { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
SECTION_PROLOGUE(.debug, 0,) { *(.debug) }
SECTION_PROLOGUE(.line, 0,) { *(.line) }
/* GNU DWARF 1 extensions */
SECTION_PROLOGUE(.debug_srcinfo, 0,) { *(.debug_srcinfo) }
SECTION_PROLOGUE(.debug_sfnames, 0,) { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
SECTION_PROLOGUE(.debug_aranges, 0,) { *(.debug_aranges) }
SECTION_PROLOGUE(.debug_pubnames, 0,) { *(.debug_pubnames) }
/* DWARF 2 */
SECTION_PROLOGUE(.debug_info, 0,) { *(.debug_info .gnu.linkonce.wi.*) }
SECTION_PROLOGUE(.debug_abbrev, 0,) { *(.debug_abbrev) }
SECTION_PROLOGUE(.debug_line, 0,) { *(.debug_line .debug_line.* .debug_line_end ) }
SECTION_PROLOGUE(.debug_frame, 0,) { *(.debug_frame) }
SECTION_PROLOGUE(.debug_str, 0,) { *(.debug_str) }
SECTION_PROLOGUE(.debug_loc, 0,) { *(.debug_loc) }
SECTION_PROLOGUE(.debug_macinfo, 0,) { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
SECTION_PROLOGUE(.debug_weaknames, 0,) { *(.debug_weaknames) }
SECTION_PROLOGUE(.debug_funcnames, 0,) { *(.debug_funcnames) }
SECTION_PROLOGUE(.debug_typenames, 0,) { *(.debug_typenames) }
SECTION_PROLOGUE(.debug_varnames, 0,) { *(.debug_varnames) }
/* DWARF 3 */
SECTION_PROLOGUE(.debug_pubtypes, 0,) { *(.debug_pubtypes) }
SECTION_PROLOGUE(.debug_ranges, 0,) { *(.debug_ranges) }
/* DWARF Extension. */
SECTION_PROLOGUE(.debug_macro, 0,) { *(.debug_macro) }

7
include/linker/priv_stacks-noinit.ld
View file

@ -1,7 +0,0 @@
/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
*(".priv_stacks.noinit")

124
include/linker/rel-sections.ld
View file

@ -1,124 +0,0 @@
/*
* .rel.* are for relocation.
* These are being produced by compiler/linker.
* Specify these here so they are not considered orphan sections.
*
* Obtained via
* '$(ARCH)-zephyr-elf-ld --verbose'
*/
#if !defined(CONFIG_RISCV32) && !defined(CONFIG_XTENSA)
SECTION_PROLOGUE(.rel.dyn,,)
{
*(.rel.init)
*(.rel.text .rel.text.* .rel.text_start.* .rel.gnu.linkonce.t.*)
*(.rel.fini)
*(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
*(.rel.data.rel.ro .rel.data.rel.ro.* .rel.gnu.linkonce.d.rel.ro.*)
*(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
*(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
*(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
#if defined(CONFIG_ARCH_POSIX)
*(.rel.preinit_array)
*(.rel.init_array)
*(.rel.fini_array)
#endif
*(.rel.ctors)
*(.rel.dtors)
*(.rel.got)
*(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
#if defined(CONFIG_ARM) || defined(CONFIG_NIOS2)
PROVIDE_HIDDEN (__rel_iplt_start = .);
*(.rel.iplt)
PROVIDE_HIDDEN (__rel_iplt_end = .);
#endif
/* These are related to sections defined by Zephyr */
*(.rel.kernel .rel.kernel.*)
*(.rel.init_PRE_KERNEL*)
*(.rel.init_POST_KERNEL*)
*(.rel.init_APPLICATION*)
#if defined(CONFIG_ARCH_POSIX)
*(.rel.native_PRE_BOOT*)
*(.rel.native_FIRST_SLEEP*)
*(.rel.native_ON_EXIT*)
#endif
*(.rel.devconfig.*)
*(.rel._k_alert.*)
*(.rel._k_mem_pool.*)
*(.rel._k_timer.*)
*(.rel._static_thread_data.*)
#if defined(CONFIG_X86)
*(.rel.ifunc)
*(.rel.mmulist)
*(.rel.tss)
#endif
}
#endif /* !defined(CONFIG_RISCV32) */
#if defined(CONFIG_ARM) || defined(CONFIG_NIOS2) || defined(CONFIG_RISCV32)
SECTION_PROLOGUE(.rela.dyn,,)
{
*(.rela.init)
*(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
*(.rela.fini)
*(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
*(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
*(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
*(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
*(.rela.ctors)
*(.rela.dtors)
*(.rela.got)
*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
#if defined(CONFIG_ARM) || defined(CONFIG_NIOS2)
PROVIDE_HIDDEN (__rela_iplt_start = .);
*(.rela.iplt)
PROVIDE_HIDDEN (__rela_iplt_end = .);
#endif
/* These are related to sections defined by Zephyr */
*(.rela.kernel .rel.kernel.*)
*(.rela.init_PRE_KERNEL*)
*(.rela.init_POST_KERNEL*)
*(.rela.init_APPLICATION*)
*(.rela._k_alert.*)
*(.rela._k_mem_pool.*)
*(.rela._k_timer.*)
*(.rela._static_thread_data.*)
#if defined(CONFIG_RISCV32)
*(.rela.devconfig.*)
*(.rela.exception.*)
*(.rela.gnu.linkonce.sw_isr_table)
*(.rela.sdata.*)
#endif
}
#endif
#if !defined(CONFIG_RISCV32) && !defined(CONFIG_XTENSA)
SECTION_PROLOGUE(.rel.plt,,)
{
*(.rel.plt)
#if defined(CONFIG_X86)
PROVIDE_HIDDEN (__rel_iplt_start = .);
*(.rel.iplt)
PROVIDE_HIDDEN (__rel_iplt_end = .);
#endif
}
#endif /* !defined(CONFIG_RISCV32) */
#if defined(CONFIG_ARM) || defined(CONFIG_NIOS2) || defined(CONFIG_RISCV32)
SECTION_PROLOGUE(.rela.plt,,)
{
*(.rela.plt)
}
#endif

5
soc/xtensa/D_108mini/linker.ld
View file

@ -178,8 +178,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram1.rodata : ALIGN(4)
{
_dram1_rodata_start = ABSOLUTE(.);
@ -565,7 +563,6 @@ SECTIONS
} >sram0_seg :sram0_bss_phdr
__stack = 0x64000000;
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -583,8 +580,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/D_212GP/linker.ld
View file

@ -178,8 +178,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
@ -571,7 +569,6 @@ SECTIONS
} >sram19_seg :sram19_bss_phdr
__stack = 0x64000000;
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -589,8 +586,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/D_233L/linker.ld
View file

@ -159,8 +159,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.WindowVectors.text : ALIGN(4)
{
_WindowVectors_text_start = ABSOLUTE(.);
@ -472,7 +470,6 @@ SECTIONS
_memmap_seg_srom1_end = ALIGN(0x8);
_image_rom_end = ABSOLUTE(.);
} >srom1_seg :srom1_phdr
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -490,8 +487,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/XRC_D2PM_5swIrq/linker.ld
View file

@ -178,8 +178,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.ResetVector.text : ALIGN(4)
{
_image_rom_start = ABSOLUTE(.);
@ -575,7 +573,6 @@ SECTIONS
} >sram19_seg :sram19_bss_phdr
PROVIDE(__stack = 0x64000000);
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -593,8 +590,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/XRC_FUSION_AON_ALL_LM/linker.ld
View file

@ -120,8 +120,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram0.rodata : ALIGN(4)
{
_dram0_rodata_start = ABSOLUTE(.);
@ -404,7 +402,6 @@ SECTIONS
PROVIDE(__stack = 0x64000000);
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -422,8 +419,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

11
soc/xtensa/esp32/linker.ld
View file

@ -64,9 +64,6 @@ PROVIDE(_memmap_reset_vector = 0x40000400);
SECTIONS
{
#include <linker/rel-sections.ld>
/* RTC fast memory holds RTC wake stub code,
including from any source file named rtc_wake_stub*.c
*/
@ -244,12 +241,4 @@ SECTIONS
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
#include <linker/debug-sections.ld>
SECTION_PROLOGUE(.xtensa.info, 0,)
{
*(.xtensa.info)
}
}

5
soc/xtensa/hifi2_std/linker.ld
View file

@ -178,8 +178,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram1.rodata : ALIGN(4)
{
_dram1_rodata_start = ABSOLUTE(.);
@ -575,7 +573,6 @@ SECTIONS
} >sram19_seg :sram19_bss_phdr
PROVIDE(__stack = 0x64000000);
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -593,8 +590,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/hifi3_bd5/linker.ld
View file

@ -118,8 +118,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.ResetVector.text : ALIGN(4)
{
_image_rom_start = ABSOLUTE(.);
@ -351,7 +349,6 @@ SECTIONS
} >sram9_seg :sram9_bss_phdr
__stack = 0x64000000;
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -369,8 +366,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/hifi3_bd5_call0/linker.ld
View file

@ -118,8 +118,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.ResetVector.text : ALIGN(4)
{
_image_rom_start = ABSOLUTE(.);
@ -351,7 +349,6 @@ SECTIONS
} >sram9_seg :sram9_bss_phdr
__stack = 0x64000000;
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -369,8 +366,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/hifi4_bd7/linker.ld
View file

@ -133,8 +133,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.ResetVector.text : ALIGN(4)
{
_image_rom_start = ABSOLUTE(.);
@ -398,7 +396,6 @@ SECTIONS
} >sram13_seg :sram13_bss_phdr
__stack = 0x60400000;
_heap_sentry = 0x60400000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -416,8 +413,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/hifi_mini/linker.ld
View file

@ -105,8 +105,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram0.rodata : ALIGN(4)
{
_dram0_rodata_start = ABSOLUTE(.);
@ -323,7 +321,6 @@ SECTIONS
_etext = .;
} >iram0_7_seg :iram0_7_phdr
_image_text_end = .;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -341,8 +338,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/hifi_mini_4swIrq/linker.ld
View file

@ -105,8 +105,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram0.rodata : ALIGN(4)
{
_dram0_rodata_start = ABSOLUTE(.);
@ -323,7 +321,6 @@ SECTIONS
_etext = .;
} >iram0_7_seg :iram0_7_phdr
_image_text_end = .;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -341,8 +338,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

6
soc/xtensa/intel_s1000/linker.ld
View file

@ -167,9 +167,6 @@ _memmap_cacheattr_intel_s1000 = 0xf2ff4242;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_intel_s1000);
SECTIONS
{
#include <linker/rel-sections.ld>
.ResetVector.text : ALIGN(4)
{
_ResetVector_text_start = ABSOLUTE(.);
@ -418,7 +415,6 @@ SECTIONS
_end = ALIGN(8);
PROVIDE(end = ALIGN(8));
__stack = L2_SRAM_BASE + L2_SRAM_SIZE;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -436,8 +432,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/sample_controller/linker.ld
View file

@ -178,8 +178,6 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram1.rodata : ALIGN(4)
{
_dram1_rodata_start = ABSOLUTE(.);
@ -565,7 +563,6 @@ SECTIONS
} >sram0_seg :sram0_bss_phdr
__stack = 0x64000000;
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -583,8 +580,6 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))