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imx: Add Messaging Unit peripheral support for i.MX6SoloX soc

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Add Messaging Unit B peripheral support for i.MX6SoloX soc so it can
use IMX IPM.

Origin: Original

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
This commit is contained in:
Stanislav Poboril 2018-06-22 11:21:22 +02:00 • committed by Kumar Gala
commit 871fc0f3c2
4 changed files with 29 additions and 0 deletions
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12
dts/arm/nxp/nxp_imx6sx_m4.dtsi
View file

@ -241,6 +241,18 @@
#gpio-cells = <2>; #gpio-cells = <2>;
status = "disabled"; status = "disabled";
}; };
mub:mu@4229c000 {
compatible = "nxp,imx-mu";
reg = <0x4229c000 0x4000>;
interrupts = <99 0>;
rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
RDC_DOMAIN_PERM_RW)|\
RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
RDC_DOMAIN_PERM_RW))>;
label = "MU_B";
status = "disabled";
};
}; };
}; };

7
soc/arm/nxp_imx/mcimx6x_m4/Kconfig.defconfig.mcimx6x_m4
View file

@ -32,4 +32,11 @@ config UART_IMX
endif # SERIAL endif # SERIAL
if IPM
config IPM_IMX
def_bool y
endif # IPM
endif # SOC_MCIMX6X_M4 endif # SOC_MCIMX6X_M4

5
soc/arm/nxp_imx/mcimx6x_m4/dts_fixup.h
View file

@ -96,3 +96,8 @@
#define DT_UART_IMX_UART_6_IRQ_PRI DT_NXP_IMX_UART_422A0000_IRQ_0_PRIORITY #define DT_UART_IMX_UART_6_IRQ_PRI DT_NXP_IMX_UART_422A0000_IRQ_0_PRIORITY
#define DT_UART_IMX_UART_6_BAUD_RATE DT_NXP_IMX_UART_422A0000_CURRENT_SPEED #define DT_UART_IMX_UART_6_BAUD_RATE DT_NXP_IMX_UART_422A0000_CURRENT_SPEED
#define DT_UART_IMX_UART_6_MODEM_MODE DT_NXP_IMX_UART_422A0000_MODEM_MODE #define DT_UART_IMX_UART_6_MODEM_MODE DT_NXP_IMX_UART_422A0000_MODEM_MODE
#define DT_IPM_IMX_MU_B_BASE_ADDRESS DT_NXP_IMX_MU_4229C000_BASE_ADDRESS
#define DT_IPM_IMX_MU_B_IRQ DT_NXP_IMX_MU_4229C000_IRQ_0
#define DT_IPM_IMX_MU_B_IRQ_PRI DT_NXP_IMX_MU_4229C000_IRQ_0_PRIORITY
#define DT_IPM_IMX_MU_B_NAME DT_NXP_IMX_MU_4229C000_LABEL

5
soc/arm/nxp_imx/mcimx6x_m4/soc.c
View file

@ -73,6 +73,11 @@ static void SOC_RdcInit(void)
/* Set access to GPIO_7 for M4 core */ /* Set access to GPIO_7 for M4 core */
RDC_SetPdapAccess(RDC, rdcPdapGpio7, GPIO_7_RDC, false, false); RDC_SetPdapAccess(RDC, rdcPdapGpio7, GPIO_7_RDC, false, false);
#endif /* CONFIG_GPIO_IMX_PORT_7 */ #endif /* CONFIG_GPIO_IMX_PORT_7 */
#ifdef CONFIG_IPM_IMX
/* Set access to MU B for M4 core */
RDC_SetPdapAccess(RDC, rdcPdapMuB, MU_B_RDC, false, false);
#endif /* CONFIG_IPM_IMX */
} }
/* Initialize cache. */ /* Initialize cache. */