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drivers: clock_control: Make LSE driving configurable

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Make the LSE driving capability configurable for the STM32 series.
Fixes #44737.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This commit is contained in:
Benedikt Schmidt 2022-04-19 11:33:09 +02:00 • committed by Carles Cufí
commit 86469b1d0b
20 changed files with 65 additions and 12 deletions
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2
drivers/bluetooth/hci/ipm_stm32wb.c
View file

@ -397,6 +397,8 @@ static void start_ble_rf(void)
}
#if STM32_LSE_ENABLED
/* Configure driving capability */
LL_RCC_LSE_SetDriveCapability(STM32_LSE_DRIVING << RCC_BDCR_LSEDRV_Pos);
/* Select LSE clock */
LL_RCC_LSE_Enable();
while (!LL_RCC_LSE_IsReady()) {

3
drivers/clock_control/clock_stm32_ll_h7.c
View file

@ -473,6 +473,9 @@ static void set_up_fixed_clock_sources(void)
/* Enable backup domain */
LL_PWR_EnableBkUpAccess();
/* Configure driving capability */
LL_RCC_LSE_SetDriveCapability(STM32_LSE_DRIVING << RCC_BDCR_LSEDRV_Pos);
/* Enable LSE oscillator */
LL_RCC_LSE_Enable();
while (LL_RCC_LSE_IsReady() != 1) {

3
drivers/clock_control/clock_stm32_ll_u5.c
View file

@ -336,6 +336,9 @@ static void set_up_fixed_clock_sources(void)
}
}
/* Configure driving capability */
LL_RCC_LSE_SetDriveCapability(STM32_LSE_DRIVING << RCC_BDCR_LSEDRV_Pos);
/* Enable LSE Oscillator */
LL_RCC_LSE_Enable();
/* Wait for LSE ready */

2
drivers/clock_control/clock_stm32g4.c
View file

@ -75,6 +75,8 @@ void config_enable_default_clocks(void)
/* Wait for Backup domain access */
}
/* Configure driving capability */
LL_RCC_LSE_SetDriveCapability(STM32_LSE_DRIVING << RCC_BDCR_LSEDRV_Pos);
/* Enable LSE Oscillator (32.768 kHz) */
LL_RCC_LSE_Enable();
while (!LL_RCC_LSE_IsReady()) {

2
drivers/clock_control/clock_stm32l4_l5_wb_wl.c
View file

@ -88,6 +88,8 @@ void config_enable_default_clocks(void)
/* Wait for Backup domain access */
}
/* Configure driving capability */
LL_RCC_LSE_SetDriveCapability(STM32_LSE_DRIVING << RCC_BDCR_LSEDRV_Pos);
/* Enable LSE Oscillator (32.768 kHz) */
LL_RCC_LSE_Enable();
while (!LL_RCC_LSE_IsReady()) {

1
drivers/timer/stm32_lptim_timer.c
View file

@ -279,6 +279,7 @@ static int sys_clock_driver_init(const struct device *dev)
/* enable LSE clock */
LL_RCC_LSE_DisableBypass();
LL_RCC_LSE_SetDriveCapability(STM32_LSE_DRIVING << RCC_BDCR_LSEDRV_Pos);
LL_RCC_LSE_Enable();
while (!LL_RCC_LSE_IsReady()) {
/* Wait for LSE ready */