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dts: nxp: s32ze: add devicetree node for code RAM

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Add devicetree node for code RAM, code RAM can be accessed
over AIXM bus or AXIF bus. Code access via AXIF interface
provides the best optimal performance

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This commit is contained in:
Dat Nguyen Duy 2024-08-28 18:12:16 +07:00 • committed by Anas Nashif
commit 56cd16efbd
9 changed files with 23 additions and 11 deletions
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2
tests/drivers/dma/chan_blen_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay
View file

@ -17,7 +17,7 @@
};
};
&sram0 {
&dram0 {
compatible = "mmio-sram";
reg = <0x31780000 DT_SIZE_K(960)>;
};

2
tests/drivers/dma/chan_blen_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay
View file

@ -17,7 +17,7 @@
};
};
&sram1 {
&dram1 {
compatible = "mmio-sram";
reg = <0x35780000 DT_SIZE_K(960)>;
};

2
tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay
View file

@ -17,7 +17,7 @@
};
};
&sram0 {
&dram0 {
compatible = "mmio-sram";
reg = <0x31780000 DT_SIZE_K(960)>;
};

2
tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay
View file

@ -17,7 +17,7 @@
};
};
&sram1 {
&dram1 {
compatible = "mmio-sram";
reg = <0x35780000 DT_SIZE_K(960)>;
};