diff --git a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts
index 3db4df08388..da6b9645614 100644
--- a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts
+++ b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts
@@ -13,7 +13,8 @@
 	compatible = "nxp,s32z270";
 
 	chosen {
-		zephyr,sram = &sram0;
+		zephyr,sram = &dram0;
+		zephyr,flash = &cram0;
 		zephyr,canbus = &canxl0;
 	};
 
diff --git a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts
index 4aadfbebb1d..286fd8d094c 100644
--- a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts
+++ b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts
@@ -13,9 +13,8 @@
 	compatible = "nxp,s32z270";
 
 	chosen {
-		zephyr,sram = &sram1;
-		zephyr,console = &uart0;
-		zephyr,shell-uart = &uart0;
+		zephyr,sram = &dram1;
+		zephyr,flash = &cram1;
 		zephyr,canbus = &flexcan0;
 	};
 
diff --git a/dts/arm/nxp/nxp_s32z27x_r52.dtsi b/dts/arm/nxp/nxp_s32z27x_r52.dtsi
index a04d5a01022..5d168173304 100644
--- a/dts/arm/nxp/nxp_s32z27x_r52.dtsi
+++ b/dts/arm/nxp/nxp_s32z27x_r52.dtsi
@@ -110,12 +110,12 @@
 			status = "okay";
 		};
 
-		sram0: memory@31780000 {
+		dram0: memory@31780000 {
 			compatible = "mmio-sram";
 			reg = <0x31780000 DT_SIZE_M(1)>;
 		};
 
-		sram1: memory@35780000 {
+		dram1: memory@35780000 {
 			compatible = "mmio-sram";
 			reg = <0x35780000 DT_SIZE_M(1)>;
 		};
diff --git a/dts/arm/nxp/nxp_s32z27x_rtu0_r52.dtsi b/dts/arm/nxp/nxp_s32z27x_rtu0_r52.dtsi
index 03428c80db0..6f7dc687d17 100644
--- a/dts/arm/nxp/nxp_s32z27x_rtu0_r52.dtsi
+++ b/dts/arm/nxp/nxp_s32z27x_rtu0_r52.dtsi
@@ -1,5 +1,5 @@
 /*
- * Copyright 2022-2023 NXP
+ * Copyright 2022-2024 NXP
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -16,6 +16,12 @@
 	};
 
 	soc {
+		/* Accessing code RAM over AXIF - a read-only flash memory bus */
+		cram0: memory@79900000 {
+			compatible = "mmio-sram";
+			reg = <0x79900000 DT_SIZE_M(7)>;
+		};
+
 		stm0: stm@76200000 {
 			compatible = "nxp,s32-sys-timer";
 			reg = <0x76200000 0x10000>;
diff --git a/dts/arm/nxp/nxp_s32z27x_rtu1_r52.dtsi b/dts/arm/nxp/nxp_s32z27x_rtu1_r52.dtsi
index 811fdfe5149..91b8de43207 100644
--- a/dts/arm/nxp/nxp_s32z27x_rtu1_r52.dtsi
+++ b/dts/arm/nxp/nxp_s32z27x_rtu1_r52.dtsi
@@ -16,6 +16,12 @@
 	};
 
 	soc {
+		/* Accessing code RAM over AXIF - a read-only flash memory bus */
+		cram1: memory@7d900000 {
+			compatible = "mmio-sram";
+			reg = <0x7d900000 DT_SIZE_M(7)>;
+		};
+
 		stm0: stm@76a00000 {
 			compatible = "nxp,s32-sys-timer";
 			reg = <0x76a00000 0x10000>;
diff --git a/tests/drivers/dma/chan_blen_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay b/tests/drivers/dma/chan_blen_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay
index e0fcca61f9b..13f1c87a01b 100644
--- a/tests/drivers/dma/chan_blen_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay
+++ b/tests/drivers/dma/chan_blen_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay
@@ -17,7 +17,7 @@
 	};
 };
 
-&sram0 {
+&dram0 {
 	compatible = "mmio-sram";
 	reg = <0x31780000 DT_SIZE_K(960)>;
 };
diff --git a/tests/drivers/dma/chan_blen_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay b/tests/drivers/dma/chan_blen_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay
index cc6211a9edc..c828ef591ed 100644
--- a/tests/drivers/dma/chan_blen_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay
+++ b/tests/drivers/dma/chan_blen_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay
@@ -17,7 +17,7 @@
 	};
 };
 
-&sram1 {
+&dram1 {
 	compatible = "mmio-sram";
 	reg = <0x35780000 DT_SIZE_K(960)>;
 };
diff --git a/tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay b/tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay
index e0fcca61f9b..13f1c87a01b 100644
--- a/tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay
+++ b/tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay
@@ -17,7 +17,7 @@
 	};
 };
 
-&sram0 {
+&dram0 {
 	compatible = "mmio-sram";
 	reg = <0x31780000 DT_SIZE_K(960)>;
 };
diff --git a/tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay b/tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay
index 2d644fc6817..b9bcb121351 100644
--- a/tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay
+++ b/tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay
@@ -17,7 +17,7 @@
 	};
 };
 
-&sram1 {
+&dram1 {
 	compatible = "mmio-sram";
 	reg = <0x35780000 DT_SIZE_K(960)>;
 };