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dts_fixups: Use DT_ prefix in all defined labels not related to Kconfig

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These changes were obtained by running a script  created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:

1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
   #define X Y)
3. Check if that name is also the name of a Kconfig option
   3.a If it is, then do nothing
   3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
       has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
   (.c, .h, .ld)

Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.

Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2018-11-13 15:15:23 +01:00 • committed by Kumar Gala
commit 20202902f2
304 changed files with 5118 additions and 5118 deletions
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40
soc/x86/apollo_lake/soc.c
View file

@ -24,7 +24,7 @@
MMU_BOOT_REGION(CONFIG_LOAPIC_BASE_ADDRESS, 4 * 1024, MMU_ENTRY_WRITE);
/* ioapic */
MMU_BOOT_REGION(CONFIG_IOAPIC_BASE_ADDRESS, 1024 * 1024, MMU_ENTRY_WRITE);
MMU_BOOT_REGION(DT_IOAPIC_BASE_ADDRESS, 1024 * 1024, MMU_ENTRY_WRITE);
#ifdef CONFIG_HPET_TIMER
MMU_BOOT_REGION(CONFIG_HPET_TIMER_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
@ -34,17 +34,17 @@ MMU_BOOT_REGION(CONFIG_HPET_TIMER_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
#ifdef CONFIG_UART_NS16550
#ifdef CONFIG_UART_NS16550_PORT_0
MMU_BOOT_REGION(CONFIG_UART_NS16550_PORT_0_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_UART_NS16550_PORT_0_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_UART_NS16550_PORT_1
MMU_BOOT_REGION(CONFIG_UART_NS16550_PORT_1_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_UART_NS16550_PORT_1_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_UART_NS16550_PORT_2
MMU_BOOT_REGION(CONFIG_UART_NS16550_PORT_2_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_UART_NS16550_PORT_2_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
@ -59,42 +59,42 @@ MMU_BOOT_REGION(CONFIG_UART_NS16550_PORT_3_BASE_ADDR, 0x1000,
#ifdef CONFIG_I2C
#ifdef CONFIG_I2C_0
MMU_BOOT_REGION(CONFIG_I2C_0_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_I2C_0_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_1
MMU_BOOT_REGION(CONFIG_I2C_1_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_I2C_1_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_2
MMU_BOOT_REGION(CONFIG_I2C_2_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_I2C_2_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_3
MMU_BOOT_REGION(CONFIG_I2C_3_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_I2C_3_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_4
MMU_BOOT_REGION(CONFIG_I2C_4_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_I2C_4_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_5
MMU_BOOT_REGION(CONFIG_I2C_5_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_I2C_5_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_6
MMU_BOOT_REGION(CONFIG_I2C_6_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_I2C_6_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
#ifdef CONFIG_I2C_7
MMU_BOOT_REGION(CONFIG_I2C_7_BASE_ADDR, 0x1000,
MMU_BOOT_REGION(DT_I2C_7_BASE_ADDR, 0x1000,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif
@ -102,17 +102,17 @@ MMU_BOOT_REGION(CONFIG_I2C_7_BASE_ADDR, 0x1000,
/* for GPIO controller */
#ifdef CONFIG_GPIO_INTEL_APL
MMU_BOOT_REGION(CONFIG_APL_GPIO_BASE_ADDRESS_0,
CONFIG_APL_GPIO_MEM_SIZE_0,
MMU_BOOT_REGION(DT_APL_GPIO_BASE_ADDRESS_0,
DT_APL_GPIO_MEM_SIZE_0,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
MMU_BOOT_REGION(CONFIG_APL_GPIO_BASE_ADDRESS_1,
CONFIG_APL_GPIO_MEM_SIZE_1,
MMU_BOOT_REGION(DT_APL_GPIO_BASE_ADDRESS_1,
DT_APL_GPIO_MEM_SIZE_1,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
MMU_BOOT_REGION(CONFIG_APL_GPIO_BASE_ADDRESS_2,
CONFIG_APL_GPIO_MEM_SIZE_2,
MMU_BOOT_REGION(DT_APL_GPIO_BASE_ADDRESS_2,
DT_APL_GPIO_MEM_SIZE_2,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
MMU_BOOT_REGION(CONFIG_APL_GPIO_BASE_ADDRESS_3,
CONFIG_APL_GPIO_MEM_SIZE_3,
MMU_BOOT_REGION(DT_APL_GPIO_BASE_ADDRESS_3,
DT_APL_GPIO_MEM_SIZE_3,
(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
#endif