soc: cc2650: Update DTS-derived labels with DT_ prefix
Update a couple of labels generated from DTS used directly (not through dts_fixups) in TI CC2650 system initialization code and a few drivers for this SoC. Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
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3 changed files with 16 additions and 16 deletions
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@ -41,19 +41,19 @@ static u32_t gpio_cc2650_get_pending_int(struct device *dev);
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/* GPIO registers */
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static const u32_t doutset31_0 =
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REG_ADDR(TI_CC2650_GPIO_40022000_BASE_ADDRESS,
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REG_ADDR(DT_TI_CC2650_GPIO_40022000_BASE_ADDRESS,
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CC2650_GPIO_DOUTSET31_0);
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static const u32_t doutclr31_0 =
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REG_ADDR(TI_CC2650_GPIO_40022000_BASE_ADDRESS,
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REG_ADDR(DT_TI_CC2650_GPIO_40022000_BASE_ADDRESS,
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CC2650_GPIO_DOUTCLR31_0);
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static const u32_t din31_0 =
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REG_ADDR(TI_CC2650_GPIO_40022000_BASE_ADDRESS,
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REG_ADDR(DT_TI_CC2650_GPIO_40022000_BASE_ADDRESS,
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CC2650_GPIO_DIN31_0);
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static const u32_t doe31_0 =
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REG_ADDR(TI_CC2650_GPIO_40022000_BASE_ADDRESS,
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REG_ADDR(DT_TI_CC2650_GPIO_40022000_BASE_ADDRESS,
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CC2650_GPIO_DOE31_0);
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static const u32_t evflags31_0 =
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REG_ADDR(TI_CC2650_GPIO_40022000_BASE_ADDRESS,
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REG_ADDR(DT_TI_CC2650_GPIO_40022000_BASE_ADDRESS,
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CC2650_GPIO_EVFLAGS31_0);
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static struct gpio_cc2650_data gpio_cc2650_data = {
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@ -97,7 +97,7 @@ static void disconnect(const int pin, u32_t *gpiodoe31_0,
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*/
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static int gpio_cc2650_config_pin(int pin, int flags)
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{
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const u32_t iocfg = REG_ADDR(TI_CC2650_PINMUX_40081000_BASE_ADDRESS,
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const u32_t iocfg = REG_ADDR(DT_TI_CC2650_PINMUX_40081000_BASE_ADDRESS,
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CC2650_IOC_IOCFG0 + 0x4 * pin);
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u32_t iocfg_config = sys_read32(iocfg);
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u32_t gpio_doe31_0_config = sys_read32(doe31_0);
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@ -209,11 +209,11 @@ static int gpio_cc2650_init(struct device *dev)
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ARG_UNUSED(dev);
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/* ISR setup */
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IRQ_CONNECT(TI_CC2650_GPIO_40022000_IRQ_0,
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TI_CC2650_GPIO_40022000_IRQ_0_PRIORITY,
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IRQ_CONNECT(DT_TI_CC2650_GPIO_40022000_IRQ_0,
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DT_TI_CC2650_GPIO_40022000_IRQ_0_PRIORITY,
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gpio_cc2650_isr, DEVICE_GET(gpio_cc2650_0),
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0);
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irq_enable(TI_CC2650_GPIO_40022000_IRQ_0);
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irq_enable(DT_TI_CC2650_GPIO_40022000_IRQ_0);
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return 0;
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}
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@ -60,7 +60,7 @@
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#define IOCFG_REG(Func) \
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REG_ADDR(TI_CC2650_PINMUX_40081000_BASE_ADDRESS, \
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REG_ADDR(DT_TI_CC2650_PINMUX_40081000_BASE_ADDRESS, \
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CC2650_IOC_IOCFG0 + 0x4 * Func)
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static int pinmux_cc2650_init(struct device *dev)
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@ -122,7 +122,7 @@ static int pinmux_cc2650_input(struct device *dev, u32_t pin,
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"I/O mode is invalid");
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const u32_t iocfg = IOCFG_REG(pin);
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const u32_t gpio_doe = TI_CC2650_GPIO_40022000_BASE_ADDRESS +
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const u32_t gpio_doe = DT_TI_CC2650_GPIO_40022000_BASE_ADDRESS +
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CC2650_GPIO_DOE31_0;
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u32_t iocfg_conf = sys_read32(iocfg);
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u32_t gpio_doe_conf = sys_read32(gpio_doe);
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@ -64,20 +64,20 @@ ti_ccfg[CCFG_SIZE / sizeof(u32_t)] = {
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/* PRCM Registers */
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static const u32_t clkloadctl =
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REG_ADDR(TI_CC2650_PRCM_40082000_BASE_ADDRESS,
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REG_ADDR(DT_TI_CC2650_PRCM_40082000_BASE_ADDRESS,
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CC2650_PRCM_CLKLOADCTL);
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static const u32_t gpioclkgr =
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REG_ADDR(TI_CC2650_PRCM_40082000_BASE_ADDRESS,
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REG_ADDR(DT_TI_CC2650_PRCM_40082000_BASE_ADDRESS,
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CC2650_PRCM_GPIOCLKGR);
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static const u32_t pdctl0 =
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REG_ADDR(TI_CC2650_PRCM_40082000_BASE_ADDRESS,
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REG_ADDR(DT_TI_CC2650_PRCM_40082000_BASE_ADDRESS,
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CC2650_PRCM_PDCTL0);
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static const u32_t pdstat0 =
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REG_ADDR(TI_CC2650_PRCM_40082000_BASE_ADDRESS,
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REG_ADDR(DT_TI_CC2650_PRCM_40082000_BASE_ADDRESS,
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CC2650_PRCM_PDSTAT0);
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#ifdef CONFIG_SERIAL
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static const u32_t uartclkgr =
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REG_ADDR(TI_CC2650_PRCM_40082000_BASE_ADDRESS,
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REG_ADDR(DT_TI_CC2650_PRCM_40082000_BASE_ADDRESS,
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CC2650_PRCM_UARTCLKGR);
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#endif
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