soc/openisa: enable the C extension

According to the RV32M1 Series Manual, Rev 1.1 RV32M1 series supports the C
extension, and doesn't support the A extension. Apply fixes accordingly.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit is contained in:
Filip Kokosinski 2024-07-01 10:03:11 +02:00 committed by Anas Nashif
commit 18ddac4acf
2 changed files with 3 additions and 3 deletions

View file

@ -17,6 +17,6 @@ config SOC_OPENISA_RV32M1
select BUILD_OUTPUT_HEX
select RISCV_ISA_RV32I
select RISCV_ISA_EXT_M
select RISCV_ISA_EXT_A
select RISCV_ISA_EXT_C
select RISCV_ISA_EXT_ZICSR
select RISCV_ISA_EXT_ZIFENCEI