zephyr/boards/arm/96b_carbon/96b_carbon.dts
Erwan Gouriou 0edf368baa boards: stm32: Move STM32 boards SPI pin configuration to device tree
Move SPI pin configuration to device tree for all STM32 based
boards.
This should not bring any change in pin configuration.

Though, some adjuments have been made on following boards for
coherency:

* b_l4s5i_iot01a1: Removed "very-high-speed" on SPI3 MOSI pin.
Tested with no impact.
* black_f407zg_pro: SPI1 pins configured but not SPI1 node.
Removed pin config as not documented neither.
* sensortile_box: SPI2 pins configured but not SPI2 node.
Removed pin config as not documented neither.
* nucleo_g431rb/nucleo_g474re/nucleo_l476rg/nucleo_l4r5zi:
SPI2 and SPI3 pins were configured but missing.
Added since they were documented.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-21 06:29:48 -05:00

152 lines
2.8 KiB
Text

/*
* Copyright (c) 2017 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <st/f4/stm32f401Xe.dtsi>
#include <st/f4/stm32f401r(d-e)tx-pinctrl.dtsi>
#include "96b_lscon.dtsi"
/ {
model = "Seeed Studio Carbon 96boards";
compatible = "seeed,carbon";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpiod 2 GPIO_ACTIVE_HIGH>;
label = "USR1 LED";
};
green_led_2: led_2 {
gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
label = "USR2 LED";
};
bt_blue_led: led_3 {
gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
label = "BT LED";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpiob 2 GPIO_ACTIVE_LOW>;
};
};
aliases {
led0 = &green_led_1;
led1 = &green_led_2;
led2 = &bt_blue_led;
sw0 = &user_button;
};
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
current-speed = <115200>;
status = "okay";
};
&usart6 {
pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c2 {
pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb3>;
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
status = "okay";
pinctrl-0 = <&spi1_miso_pa6 &spi1_mosi_pa7
&spi1_sck_pa5 &spi1_nss_pa4>;
/* Nordic nRF51822-QFAC */
bt-hci@0 {
compatible = "zephyr,bt-hci-spi";
reg = <0>;
reset-gpios = <&gpiob 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
irq-gpios = <&gpiob 1 GPIO_ACTIVE_HIGH>;
spi-max-frequency = <2000000>;
label = "BT_HCI";
};
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
status = "okay";
};
&usbotg_fs {
status = "okay";
};
&flash0 {
/*
* For more information, see:
* https://docs.zephyrproject.org/latest/guides/dts/legacy-macros.html#legacy-flash-partitions
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x00008000>;
read-only;
};
/*
* The flash starting at offset 0x00008000 and ending at
* offset 0x0001ffff (sectors 2 through 4) is reserved for
* use by the application.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 0x00020000>;
};
slot1_partition: partition@40000 {
label = "image-1";
reg = <0x00040000 0x00020000>;
};
scratch_partition: partition@60000 {
label = "image-scratch";
reg = <0x00060000 0x00020000>;
};
};
};
&rtc {
status = "okay";
};