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arm: use BASEPRI_MAX instead of BASEPRI to mask interrupts

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When locking interrupt in a critical session, it is
safer to do MSR BASEPRI_MAX instead of BASEPRI. The
rationale is that when writing to BASEPRI_MAX, the
writing is conditional, and is only applied if the
change is to a higher priority level. This commit
replaces BASEPRI with BASEPRI_MAX in operations that
aim to lock some specific interrupts:
- irq_lock()
- masking out PendSV
So, for example, it is not possible to actually
unmask any interrupts by doing an irq_lock operation.
The commit does not introduce behavioral changes.
However, it makes irq_lock() more robust against
future changes to the IRQ locking mechanism.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2021-06-22 11:46:50 +02:00 • committed by Christopher Friedt
commit 03c4bcd920
3 changed files with 4 additions and 4 deletions
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2
arch/arm/core/aarch32/swap_helper.S
View file

@ -130,7 +130,7 @@ out_fp_endif:
cpsid i cpsid i
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) #elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
movs.n r0, #_EXC_IRQ_DEFAULT_PRIO movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
msr BASEPRI, r0 msr BASEPRI_MAX, r0
isb /* Make the effect of disabling interrupts be realized immediately */ isb /* Make the effect of disabling interrupts be realized immediately */
#elif defined(CONFIG_ARMV7_R) #elif defined(CONFIG_ARMV7_R)
/* /*

4
arch/arm/core/aarch32/userspace.S
View file

@ -192,7 +192,7 @@ SECTION_FUNC(TEXT,z_arm_userspace_enter)
/* Lock PendSV while reprogramming PSP and PSPLIM */ /* Lock PendSV while reprogramming PSP and PSPLIM */
mov r0, #_EXC_PENDSV_PRIO_MASK mov r0, #_EXC_PENDSV_PRIO_MASK
msr BASEPRI, r0 msr BASEPRI_MAX, r0
isb isb
/* Set PSPLIM to guard the thread's user stack. */ /* Set PSPLIM to guard the thread's user stack. */
@ -456,7 +456,7 @@ dispatch_syscall:
/* Lock PendSV while reprogramming PSP and PSPLIM */ /* Lock PendSV while reprogramming PSP and PSPLIM */
mov r3, #_EXC_PENDSV_PRIO_MASK mov r3, #_EXC_PENDSV_PRIO_MASK
msr BASEPRI, r3 msr BASEPRI_MAX, r3
isb isb
/* Set PSPLIM to guard the thread's user stack. */ /* Set PSPLIM to guard the thread's user stack. */

2
include/arch/arm/aarch32/asm_inline_gcc.h
View file

@ -56,7 +56,7 @@ static ALWAYS_INLINE unsigned int arch_irq_lock(void)
__asm__ volatile( __asm__ volatile(
"mov %1, %2;" "mov %1, %2;"
"mrs %0, BASEPRI;" "mrs %0, BASEPRI;"
"msr BASEPRI, %1;" "msr BASEPRI_MAX, %1;"
"isb;" "isb;"
: "=r"(key), "=r"(tmp) : "=r"(key), "=r"(tmp)
: "i"(_EXC_IRQ_DEFAULT_PRIO) : "i"(_EXC_IRQ_DEFAULT_PRIO)