From 03c4bcd920815b6ec184fceb9138d22d1c2098ee Mon Sep 17 00:00:00 2001 From: Ioannis Glaropoulos Date: Tue, 22 Jun 2021 11:46:50 +0200 Subject: [PATCH] arm: use BASEPRI_MAX instead of BASEPRI to mask interrupts When locking interrupt in a critical session, it is safer to do MSR BASEPRI_MAX instead of BASEPRI. The rationale is that when writing to BASEPRI_MAX, the writing is conditional, and is only applied if the change is to a higher priority level. This commit replaces BASEPRI with BASEPRI_MAX in operations that aim to lock some specific interrupts: - irq_lock() - masking out PendSV So, for example, it is not possible to actually unmask any interrupts by doing an irq_lock operation. The commit does not introduce behavioral changes. However, it makes irq_lock() more robust against future changes to the IRQ locking mechanism. Signed-off-by: Ioannis Glaropoulos --- arch/arm/core/aarch32/swap_helper.S | 2 +- arch/arm/core/aarch32/userspace.S | 4 ++-- include/arch/arm/aarch32/asm_inline_gcc.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/core/aarch32/swap_helper.S b/arch/arm/core/aarch32/swap_helper.S index 70b009e3442..2581dc938e0 100644 --- a/arch/arm/core/aarch32/swap_helper.S +++ b/arch/arm/core/aarch32/swap_helper.S @@ -130,7 +130,7 @@ out_fp_endif: cpsid i #elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) movs.n r0, #_EXC_IRQ_DEFAULT_PRIO - msr BASEPRI, r0 + msr BASEPRI_MAX, r0 isb /* Make the effect of disabling interrupts be realized immediately */ #elif defined(CONFIG_ARMV7_R) /* diff --git a/arch/arm/core/aarch32/userspace.S b/arch/arm/core/aarch32/userspace.S index 10c7ec3f123..729a114e73b 100644 --- a/arch/arm/core/aarch32/userspace.S +++ b/arch/arm/core/aarch32/userspace.S @@ -192,7 +192,7 @@ SECTION_FUNC(TEXT,z_arm_userspace_enter) /* Lock PendSV while reprogramming PSP and PSPLIM */ mov r0, #_EXC_PENDSV_PRIO_MASK - msr BASEPRI, r0 + msr BASEPRI_MAX, r0 isb /* Set PSPLIM to guard the thread's user stack. */ @@ -456,7 +456,7 @@ dispatch_syscall: /* Lock PendSV while reprogramming PSP and PSPLIM */ mov r3, #_EXC_PENDSV_PRIO_MASK - msr BASEPRI, r3 + msr BASEPRI_MAX, r3 isb /* Set PSPLIM to guard the thread's user stack. */ diff --git a/include/arch/arm/aarch32/asm_inline_gcc.h b/include/arch/arm/aarch32/asm_inline_gcc.h index d53edb57575..7d492224a66 100644 --- a/include/arch/arm/aarch32/asm_inline_gcc.h +++ b/include/arch/arm/aarch32/asm_inline_gcc.h @@ -56,7 +56,7 @@ static ALWAYS_INLINE unsigned int arch_irq_lock(void) __asm__ volatile( "mov %1, %2;" "mrs %0, BASEPRI;" - "msr BASEPRI, %1;" + "msr BASEPRI_MAX, %1;" "isb;" : "=r"(key), "=r"(tmp) : "i"(_EXC_IRQ_DEFAULT_PRIO)