zephyr/dts/arm/st/l1/stm32l1.dtsi

/*
 * Copyright (c) 2019 Linaro Ltd.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <arm/armv7-m.dtsi>
#include <dt-bindings/clock/stm32_clock.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-m3";
			reg = <0>;
		};
	};

	sram0: memory@20000000 {
		device_type = "memory";
		compatible = "mmio-sram";
	};

	soc {
		rcc: rcc@40023800 {
			compatible = "st,stm32-rcc";
			clocks-controller;
			#clock-cells = <2>;
			reg = <0x40023800 0x400>;
			label = "STM32_CLK_RCC";
		};

		flash-controller@40023c00 {
			compatible = "st,stm32l1-flash-controller";
			label = "FLASH_CTRL";
			reg = <0x40023c00 0x400>;
			interrupts = <4 0>;

			#address-cells = <1>;
			#size-cells = <1>;

			flash0: flash@8000000 {
				compatible = "soc-nv-flash";
				label = "FLASH_STM32";

				write-block-size = <4>;
			};
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <4>;
};