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zephyr/soc/x86/ia32/soc.c

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Introduce the Atom SoC This is a generic Atom configuration that can be inherited by boards with Atom SoC like the minnowboard. Change-Id: I06ab999062be7811d14755fd34440dee8f8b81ed Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-12-17 00:03:40 -05:00
/*
* Copyright (c) 2011-2015, Wind River Systems, Inc.
*
license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-18 17:01:01 -08:00
* SPDX-License-Identifier: Apache-2.0
Introduce the Atom SoC This is a generic Atom configuration that can be inherited by boards with Atom SoC like the minnowboard. Change-Id: I06ab999062be7811d14755fd34440dee8f8b81ed Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-12-17 00:03:40 -05:00
*/
/**
* @file
* @brief System/hardware module for the ia32 platform
*
* This module provides routines to initialize and support board-level hardware
* for the ia32 platform.
*/
kernel: replace all remaining nanokernel occurances replace include <nanokernel.h> with <kernel.h> everywhere and also fix any remaining mentions of nanokernel. Keep the legacy samples/tests as is. Change-Id: Iac48447bd191e83f21a719c69dc26233216d08dc Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-23 08:35:34 -05:00
#include <kernel.h>
Use SoC instead of platform. Change terminology and use SoC instead of platform. An SoC provides features and default configurations available with an SoC. A board implements the SoC and adds more features and IP block specific to the board to extend the SoC functionality such as sensors and debugging features. Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-12-17 08:54:35 -05:00
#include "soc.h"
cleanup: include/: move uart.h to drivers/uart.h move uart.h to drivers/uart.h and create a shim for backward-compatibility. No functional changes to the headers. A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES. Related to #16539 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-25 15:54:01 -04:00
#include <drivers/uart.h>
Introduce the Atom SoC This is a generic Atom configuration that can be inherited by boards with Atom SoC like the minnowboard. Change-Id: I06ab999062be7811d14755fd34440dee8f8b81ed Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-12-17 00:03:40 -05:00
#include <device.h>
#include <init.h>
arch/x86: move arch/x86/include/mmustructs.h to ia32/mmustructs.h For now, only the 32-bit subarchitecture supports memory protection. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-29 11:00:39 -07:00
#include <ia32/mmustructs.h>
x86: ia32: set access based on linker regions This will set program text and rodata as read-only even in non-XIP systems. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-11 09:59:30 -07:00
#include <linker/linker-defs.h>
qemu: MMU: Memory regions for qemu_x86 Define the memory regions needed to generate boot time page tables. JIRA:ZEP-2098 Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-05-22 11:25:47 +05:30
#ifdef CONFIG_X86_MMU
x86: ia32: set access based on linker regions This will set program text and rodata as read-only even in non-XIP systems. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-11 09:59:30 -07:00
MMU_BOOT_REGION(CONFIG_LOAPIC_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
dts_fixups: Use DT_ prefix in all defined labels not related to Kconfig These changes were obtained by running a script created by Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following specification: 1. Read the contents of all dts_fixup.h files in Zephyr 2. Check the left-hand side of the #define macros (i.e. the X in #define X Y) 3. Check if that name is also the name of a Kconfig option 3.a If it is, then do nothing 3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it has neither of these two prefixes 4. Replace the use of the changed #define in the code itself (.c, .h, .ld) Additionally, some tweaks had to be added to this script to catch some of the macros used in the code in a parameterized form, e.g.: - CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS - CONFIG_UART_##idx##_TX_PIN - I2C_SBCON_##_num##_BASE_ADDR and to prevent adding DT_ prefix to the following symbols: - FLASH_START - FLASH_SIZE - SRAM_START - SRAM_SIZE - _ROM_ADDR - _ROM_SIZE - _RAM_ADDR - _RAM_SIZE which are surprisingly also defined in some dts_fixup.h files. Finally, some manual corrections had to be done as well: - name##_IRQ -> DT_##name##_IRQ in uart_stm32.c Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-11-13 15:15:23 +01:00
MMU_BOOT_REGION(DT_IOAPIC_BASE_ADDRESS, MB(1), MMU_ENTRY_WRITE);
build: Only have MMU_BOOT_REGION decl. for HPET if the latter is on This would impact builds with no CONFIG_HPET_TIMER=y set. Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
2017-10-11 13:55:06 -07:00
#ifdef CONFIG_HPET_TIMER
x86: ia32: set access based on linker regions This will set program text and rodata as read-only even in non-XIP systems. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-11 09:59:30 -07:00
MMU_BOOT_REGION(CONFIG_HPET_TIMER_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
build: Only have MMU_BOOT_REGION decl. for HPET if the latter is on This would impact builds with no CONFIG_HPET_TIMER=y set. Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
2017-10-11 13:55:06 -07:00
#endif
drivers: eth: e1000: Add driver for Intel PRO/1000 Ethernet controller This patch adds a driver for Intel PRO/1000 Gigabit Ethernet controller. The driver currently supports only a single instance of the NIC. Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
2018-07-31 12:44:34 +03:00
#ifdef CONFIG_ETH_E1000
dts_fixups: Use DT_ prefix in all defined labels not related to Kconfig These changes were obtained by running a script created by Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following specification: 1. Read the contents of all dts_fixup.h files in Zephyr 2. Check the left-hand side of the #define macros (i.e. the X in #define X Y) 3. Check if that name is also the name of a Kconfig option 3.a If it is, then do nothing 3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it has neither of these two prefixes 4. Replace the use of the changed #define in the code itself (.c, .h, .ld) Additionally, some tweaks had to be added to this script to catch some of the macros used in the code in a parameterized form, e.g.: - CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS - CONFIG_UART_##idx##_TX_PIN - I2C_SBCON_##_num##_BASE_ADDR and to prevent adding DT_ prefix to the following symbols: - FLASH_START - FLASH_SIZE - SRAM_START - SRAM_SIZE - _ROM_ADDR - _ROM_SIZE - _RAM_ADDR - _RAM_SIZE which are surprisingly also defined in some dts_fixup.h files. Finally, some manual corrections had to be done as well: - name##_IRQ -> DT_##name##_IRQ in uart_stm32.c Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-11-13 15:15:23 +01:00
MMU_BOOT_REGION(DT_ETH_E1000_BASE_ADDRESS, KB(128), MMU_ENTRY_WRITE);
drivers: eth: e1000: Add driver for Intel PRO/1000 Ethernet controller This patch adds a driver for Intel PRO/1000 Gigabit Ethernet controller. The driver currently supports only a single instance of the NIC. Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
2018-07-31 12:44:34 +03:00
#endif
qemu: MMU: Memory regions for qemu_x86 Define the memory regions needed to generate boot time page tables. JIRA:ZEP-2098 Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-05-22 11:25:47 +05:30
#endif /* CONFIG_X86_MMU*/
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