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zephyr/include/drivers/clock_control/stm32_clock_control.h

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clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 15:33:04 +01:00
/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
stm32l4: add clock control driver Add the clock driver for the STM32L4 series. Change-Id: Icdf79061f163d8d00187b382d1564422fb875c5b Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-10-03 15:46:48 +02:00
* Copyright (c) 2016 BayLibre, SAS
clock control:stm32: provide STM32Cube LL based driver This new clock control driver aims at providing a lightweight generic driver to the whole stm32 family. Driver is based on LL Cube API and hence is for now available only for STM32 supporting this API: stm32f3xx and stm32l4xx. Other families should be supported soon. Once globally supported, this unique driver will also help reducing the impact of stm32 clock control heterogeneity in other drivers. Change-Id: Id15a8d0d44f03809b2907ef10d6877700459e674 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-01-23 17:45:42 +01:00
* Copyright (c) 2017 Linaro Limited.
drivers: clock_control: provide support for stm32f0. Fixes #3923 Signed-off-by: Maciej Debski <maciej.debski@rndity.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-08-09 11:21:53 +02:00
* Copyright (c) 2017 RnDity Sp. z o.o.
clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 15:33:04 +01:00
*
license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-18 17:01:01 -08:00
* SPDX-License-Identifier: Apache-2.0
clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 15:33:04 +01:00
*/
headers: Fix headers across the project Any word started with underscore followed by and uppercase letter or a second underscore is a reserved word according with C99. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-14 10:43:44 -07:00
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_STM32_CLOCK_CONTROL_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_STM32_CLOCK_CONTROL_H_
clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 15:33:04 +01:00
cleanup: include/: move clock_control.h to drivers/clock_control.h move clock_control.h to drivers/clock_control.h and create a shim for backward-compatibility. No functional changes to the headers. A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES. Related to #16539 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-25 15:53:47 -04:00
#include <drivers/clock_control.h>
dts: arm: Add clocks u(s)art on stm32 family Add "clocks" property on u(s)arts nodes on stm32 socs Add a dt clocks binding file and rework clock_control header file include new device tree binding file. include/dt-bindings folder is introduced as dt-bindings placeholder Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-25 16:04:15 +02:00
#include <dt-bindings/clock/stm32_clock.h>
clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 15:33:04 +01:00
soc: stm32: convert to use DEVICE_DT_GET for clocks Convert from device_get_binding to DEVICE_DT_GET. In doing this we no longer need the label in the devicetree node so we remove that. Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if DEVICE_DT_GET cant be satisfied, and the clock control api's will handle reporting if the device_is_ready. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-11 11:49:24 -06:00
/* common clock control device node for all STM32 chips */
#define STM32_CLOCK_CONTROL_NODE DT_NODELABEL(rcc)
clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 15:33:04 +01:00
include/drivers/clock_control: stm32: Simplify macro definitions When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent DT_NODELABEL(rcc). Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) by equivalent DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay). Last, don't check about rcc node label status, which is not an optional node. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 14:45:59 +02:00
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), ahb_prescaler)
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#define STM32_AHB_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb_prescaler)
#endif
include/drivers/clock_control: stm32: Simplify macro definitions When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent DT_NODELABEL(rcc). Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) by equivalent DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay). Last, don't check about rcc node label status, which is not an optional node. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 14:45:59 +02:00
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), apb1_prescaler)
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#define STM32_APB1_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb1_prescaler)
#endif
include/drivers/clock_control: stm32: Simplify macro definitions When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent DT_NODELABEL(rcc). Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) by equivalent DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay). Last, don't check about rcc node label status, which is not an optional node. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 14:45:59 +02:00
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), apb2_prescaler)
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#define STM32_APB2_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb2_prescaler)
#endif
include/drivers/clock_control: stm32: Simplify macro definitions When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent DT_NODELABEL(rcc). Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) by equivalent DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay). Last, don't check about rcc node label status, which is not an optional node. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 14:45:59 +02:00
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), apb3_prescaler)
dts/arm/st: Add stm32u5 base and initial device Add initial basic description for Cortex-M33 based stm32u5 soc series. This encompass description for base nodes, such as: - cpu - flash - clocks - sram Additionally, provide description for variant stm32u575Xi. Related to clocks nodes, added bindings for stm32u5 specific rcc node as well as msi and pll clocks. Header file stm32_clock_control.h was also updated to support these new bindings. Note that for compatibility with existing definitions, clock node describing main pll clock, known as "PLL1", was given two labels: "pll" and "pll1". Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-06-23 13:30:12 +02:00
#define STM32_APB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb3_prescaler)
#endif
include/drivers/clock_control: stm32: Simplify macro definitions When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent DT_NODELABEL(rcc). Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) by equivalent DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay). Last, don't check about rcc node label status, which is not an optional node. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 14:45:59 +02:00
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), ahb3_prescaler)
include/drivers: clock_control: Add support for STM32WL bindings Add support for STM32WL clocks bindings. Additionally fix a spot where STM32WB was missing. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-16 11:37:55 +02:00
#define STM32_AHB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb3_prescaler)
#endif
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
include/drivers/clock_control: stm32: Simplify macro definitions When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent DT_NODELABEL(rcc). Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) by equivalent DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay). Last, don't check about rcc node label status, which is not an optional node. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 14:45:59 +02:00
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), ahb4_prescaler)
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#define STM32_AHB4_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb4_prescaler)
#endif
include/drivers/clock_control: stm32: Simplify macro definitions When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent DT_NODELABEL(rcc). Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) by equivalent DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay). Last, don't check about rcc node label status, which is not an optional node. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 14:45:59 +02:00
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), cpu1_prescaler)
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#define STM32_CPU1_PRESCALER DT_PROP(DT_NODELABEL(rcc), cpu1_prescaler)
#endif
include/drivers/clock_control: stm32: Simplify macro definitions When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent DT_NODELABEL(rcc). Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) by equivalent DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay). Last, don't check about rcc node label status, which is not an optional node. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 14:45:59 +02:00
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), cpu2_prescaler)
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#define STM32_CPU2_PRESCALER DT_PROP(DT_NODELABEL(rcc), cpu2_prescaler)
#endif
include/drivers/clock_control: stm32: Bits for H7 dts clock config Add required macros to introduce dts based clock_control driver configuration on stm32h7 devices. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 14:38:57 +02:00
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(rcc), st_stm32h7_rcc, okay) && \
drivers/clock_control: stm32h7_m4: Don't rely on rcc "clocks" property In prts of the code, we use rcc node "clocks" property to testify the use of device tree for clocks configuration. This doesn't work in case of stm32h7 m4 targets as for those, "upstream rcc" clock configuration, such as sysclk source selection, is done on m7 core and hence rcc node doesn't have a "clocks" property. To work around this, use alternate "d1cpre" property in case of stm32h7 targets. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-05 09:28:35 +02:00
DT_NODE_HAS_PROP(DT_NODELABEL(rcc), d1cpre)
include/drivers/clock_control: stm32: Bits for H7 dts clock config Add required macros to introduce dts based clock_control driver configuration on stm32h7 devices. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 14:38:57 +02:00
#define STM32_D1CPRE DT_PROP(DT_NODELABEL(rcc), d1cpre)
#define STM32_HPRE DT_PROP(DT_NODELABEL(rcc), hpre)
#define STM32_D2PPRE1 DT_PROP(DT_NODELABEL(rcc), d2ppre1)
#define STM32_D2PPRE2 DT_PROP(DT_NODELABEL(rcc), d2ppre2)
#define STM32_D1PPRE DT_PROP(DT_NODELABEL(rcc), d1ppre)
#define STM32_D3PPRE DT_PROP(DT_NODELABEL(rcc), d3ppre)
#endif
include/drivers: clock_control: Minor clean up on stm32 header Reorder few lines for better readability. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-15 15:54:44 +02:00
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f2_pll_clock, okay) || \
include/drivers/clock_control: stm32: Update for F0/F3/G0/G4 support Update macros for STM32F0/F3/G0/G4 clock configuration. Additionally update matching drivers. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-14 16:21:03 +02:00
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f4_pll_clock, okay) || \
include/drivers: clock_control: Add support for STM32F7 bindings Add support for STM32F7 clocks bindings. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-15 15:42:55 +02:00
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f7_pll_clock, okay) || \
include/drivers: clock_control: Minor clean up on stm32 header Reorder few lines for better readability. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-15 15:54:44 +02:00
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32g0_pll_clock, okay) || \
include/drivers/clock_control: stm32: Update for F0/F3/G0/G4 support Update macros for STM32F0/F3/G0/G4 clock configuration. Additionally update matching drivers. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-14 16:21:03 +02:00
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32g4_pll_clock, okay) || \
include/drivers: clock_control: Minor clean up on stm32 header Reorder few lines for better readability. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-15 15:54:44 +02:00
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32l4_pll_clock, okay) || \
dts/arm/st: Add stm32u5 base and initial device Add initial basic description for Cortex-M33 based stm32u5 soc series. This encompass description for base nodes, such as: - cpu - flash - clocks - sram Additionally, provide description for variant stm32u575Xi. Related to clocks nodes, added bindings for stm32u5 specific rcc node as well as msi and pll clocks. Header file stm32_clock_control.h was also updated to support these new bindings. Note that for compatibility with existing definitions, clock node describing main pll clock, known as "PLL1", was given two labels: "pll" and "pll1". Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-06-23 13:30:12 +02:00
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32u5_pll_clock, okay) || \
include/drivers/clock_control: stm32: Bits for H7 dts clock config Add required macros to introduce dts based clock_control driver configuration on stm32h7 devices. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 14:38:57 +02:00
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32wb_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32h7_pll_clock, okay)
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#define STM32_PLL_M_DIVISOR DT_PROP(DT_NODELABEL(pll), div_m)
#define STM32_PLL_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul_n)
#define STM32_PLL_P_DIVISOR DT_PROP(DT_NODELABEL(pll), div_p)
#define STM32_PLL_Q_DIVISOR DT_PROP(DT_NODELABEL(pll), div_q)
#define STM32_PLL_R_DIVISOR DT_PROP(DT_NODELABEL(pll), div_r)
#endif
include/drivers/clock_control: stm32: Bits for H7 dts clock config Add required macros to introduce dts based clock_control driver configuration on stm32h7 devices. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 14:38:57 +02:00
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll3), st_stm32h7_pll_clock, okay)
#define STM32_PLL3_ENABLE 1
#define STM32_PLL3_M_DIVISOR DT_PROP(DT_NODELABEL(pll3), div_m)
#define STM32_PLL3_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll3), mul_n)
#define STM32_PLL3_P_ENABLE DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_p)
#define STM32_PLL3_P_DIVISOR DT_PROP(DT_NODELABEL(pll3), div_p)
#define STM32_PLL3_Q_ENABLE DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_q)
#define STM32_PLL3_Q_DIVISOR DT_PROP(DT_NODELABEL(pll3), div_q)
#define STM32_PLL3_R_ENABLE DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_r)
#define STM32_PLL3_R_DIVISOR DT_PROP(DT_NODELABEL(pll3), div_r)
#endif
include/drivers/clock_control: stm32: Update for STM32F1 support Add missing macros fro STM32F1 clock configuration Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-13 15:51:32 +02:00
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay)
#define STM32_PLL_XTPRE DT_PROP(DT_NODELABEL(pll), xtre)
#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
include/drivers: clock_control: Minor clean up on stm32 header Reorder few lines for better readability. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-15 15:54:44 +02:00
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f0_pll_clock, okay) || \
dts/bindings: clocks: Add binding for stm32f100 pll Add specific binding for stm32f100 pll which differs from existing stm32f1 and stm32f105 specific pll binding. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-03 21:19:58 +02:00
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f100_pll_clock, okay) || \
include/drivers: clock_control: Minor clean up on stm32 header Reorder few lines for better readability. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-15 15:54:44 +02:00
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f105_pll_clock, okay)
include/drivers/clock_control: stm32: Update for STM32F1 support Add missing macros fro STM32F1 clock configuration Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-13 15:51:32 +02:00
#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
include/driver/clock_control: stm32: Remove STM32_PLL_PREDIV1 Make the code coherent with the comment: purely remove STM32_PLL_PREDIV1. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 16:58:56 +02:00
#define STM32_PLL_PREDIV DT_PROP(DT_NODELABEL(pll), prediv)
include/drivers: clock_control: Add support for STM32L0 bindings Add support for STM32L0 clocks bindings. Also, add a small tweak to SYSCLK selection to factorize some lines. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-12 14:35:09 +02:00
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32l0_pll_clock, okay)
#define STM32_PLL_DIVISOR DT_PROP(DT_NODELABEL(pll), div)
#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
include/drivers/clock_control: stm32: Update for STM32F1 support Add missing macros fro STM32F1 clock configuration Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-13 15:51:32 +02:00
#endif
include/drivers/clock_control: stm32: Simplify macro definitions When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent DT_NODELABEL(rcc). Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) by equivalent DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay). Last, don't check about rcc node label status, which is not an optional node. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 14:45:59 +02:00
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), clocks)
include/drivers: clock_control: Minor clean up on stm32 header Reorder few lines for better readability. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-15 15:54:44 +02:00
#define DT_RCC_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(rcc))
include/drivers: clock_control: Add support for STM32L0 bindings Add support for STM32L0 clocks bindings. Also, add a small tweak to SYSCLK selection to factorize some lines. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-12 14:35:09 +02:00
#define STM32_SYSCLK_SRC_PLL DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(pll))
#define STM32_SYSCLK_SRC_HSI DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
#define STM32_SYSCLK_SRC_HSE DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
#define STM32_SYSCLK_SRC_MSI DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
include/drivers/clock_control: stm32: Bits for H7 dts clock config Add required macros to introduce dts based clock_control driver configuration on stm32h7 devices. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 14:38:57 +02:00
#define STM32_SYSCLK_SRC_CSI DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_csi))
include: drivers: clock_control: stm32u5 missing MSIS define Missing definition of STM32_SYSCLK_SRC_MSIS especially needed for STM32U5 Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-11-19 11:02:46 +01:00
#define STM32_SYSCLK_SRC_MSIS DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#endif
include/drivers/clock_control: stm32: Simplify macro definitions When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent DT_NODELABEL(rcc). Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) by equivalent DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay). Last, don't check about rcc node label status, which is not an optional node. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-13 14:45:59 +02:00
#if DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay) && \
include/drivers/clock_control: stm32: Fixup to ensure backward compat In order to ensure backward compatibility, use the dts config only if nodes have prop "clocks". Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-28 16:28:07 +02:00
DT_NODE_HAS_PROP(DT_NODELABEL(pll), clocks)
include/drivers: clock_control: Minor clean up on stm32 header Reorder few lines for better readability. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-15 15:54:44 +02:00
#define DT_PLL_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(pll))
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#define STM32_PLL_SRC_MSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
dts/arm/st: Add stm32u5 base and initial device Add initial basic description for Cortex-M33 based stm32u5 soc series. This encompass description for base nodes, such as: - cpu - flash - clocks - sram Additionally, provide description for variant stm32u575Xi. Related to clocks nodes, added bindings for stm32u5 specific rcc node as well as msi and pll clocks. Header file stm32_clock_control.h was also updated to support these new bindings. Note that for compatibility with existing definitions, clock node describing main pll clock, known as "PLL1", was given two labels: "pll" and "pll1". Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-06-23 13:30:12 +02:00
#define STM32_PLL_SRC_MSIS DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#define STM32_PLL_SRC_HSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
#define STM32_PLL_SRC_HSE DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
include/drivers/clock_control: stm32: Update for STM32F1 support Add missing macros fro STM32F1 clock configuration Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-13 15:51:32 +02:00
#define STM32_PLL_SRC_PLL2 DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(pll2))
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lse), fixed_clock, okay)
include/drivers/clock_control: stm32: Fix typo in LSE definition Fix typo to enjoy expected LSE setting Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-28 08:36:50 +02:00
#define STM32_LSE_CLOCK DT_PROP(DT_NODELABEL(clk_lse), clock_frequency)
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#endif
include/drivers: clock_control: Add support for STM32L0 bindings Add support for STM32L0 clocks bindings. Also, add a small tweak to SYSCLK selection to factorize some lines. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-12 14:35:09 +02:00
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msi), st_stm32_msi_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msi), st_stm32l0_msi_clock, okay)
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#define STM32_MSI_RANGE DT_PROP(DT_NODELABEL(clk_msi), msi_range)
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msi), st_stm32_msi_clock, okay)
#define STM32_MSI_PLL_MODE DT_PROP(DT_NODELABEL(clk_msi), msi_pll_mode)
#endif
dts/arm/st: Add stm32u5 base and initial device Add initial basic description for Cortex-M33 based stm32u5 soc series. This encompass description for base nodes, such as: - cpu - flash - clocks - sram Additionally, provide description for variant stm32u575Xi. Related to clocks nodes, added bindings for stm32u5 specific rcc node as well as msi and pll clocks. Header file stm32_clock_control.h was also updated to support these new bindings. Note that for compatibility with existing definitions, clock node describing main pll clock, known as "PLL1", was given two labels: "pll" and "pll1". Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-06-23 13:30:12 +02:00
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msis), st_stm32u5_msi_clock, okay)
#define STM32_MSIS_RANGE DT_PROP(DT_NODELABEL(clk_msis), msi_range)
#define STM32_MSIS_PLL_MODE DT_PROP(DT_NODELABEL(clk_msis), msi_pll_mode)
#endif
include/drivers/clock_control: stm32: Bits for H7 dts clock config Add required macros to introduce dts based clock_control driver configuration on stm32h7 devices. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 14:38:57 +02:00
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi), st_stm32h7_hsi_clock, okay)
#define STM32_HSI_DIVISOR DT_PROP(DT_NODELABEL(clk_hsi), hsi_div)
#endif
drivers/clock_controller: stm32: Prepare for dts based configuration To allow transition to device tree based clock configuration on stm32 targets, rework clock_control driver to use intermediate STM32_ macros initially defined as the equivalent Kconfig macros for now. Propagate the change in all code using these macros. The reason to introduce these new macros instead of configuring Kconfig flags using dt kconfigfunctions is that we'll need to be able to inform users that Kconfig flags are deprecated once the whole family conversion is done, to encourage out of tree users to adopt this new configuration scheme. Note: For now STM32H7 series and code is excluded. This is the same for some series specific code such as PLL mul/div for L0/L1 and XTRE prescaler on F1 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-31 15:46:10 +02:00
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), st_stm32_hse_clock, okay)
#define STM32_HSE_BYPASS DT_PROP(DT_NODELABEL(clk_hse), hse_bypass)
#endif
dts/bindings: Add binding for STM32WL HSE Clock STM32WL features a specific HSE clock with dedicated properties. Add a dedicated binding and update STM32 clock control driver header to take it into account. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-28 16:12:07 +02:00
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), st_stm32wl_hse_clock, okay)
#define STM32_HSE_TCXO DT_PROP(DT_NODELABEL(clk_hse), hse_tcxo)
#define STM32_HSE_DIV2 DT_PROP(DT_NODELABEL(clk_hse), hse_div2)
#endif
clock control:stm32: provide STM32Cube LL based driver This new clock control driver aims at providing a lightweight generic driver to the whole stm32 family. Driver is based on LL Cube API and hence is for now available only for STM32 supporting this API: stm32f3xx and stm32l4xx. Other families should be supported soon. Once globally supported, this unique driver will also help reducing the impact of stm32 clock control heterogeneity in other drivers. Change-Id: Id15a8d0d44f03809b2907ef10d6877700459e674 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-01-23 17:45:42 +01:00
struct stm32_pclken {
zephyr: replace zephyr integer types with C99 types git grep -l 'u\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g" git grep -l 's\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g" Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-27 11:26:57 -05:00
uint32_t bus;
uint32_t enr;
clock control:stm32: provide STM32Cube LL based driver This new clock control driver aims at providing a lightweight generic driver to the whole stm32 family. Driver is based on LL Cube API and hence is for now available only for STM32 supporting this API: stm32f3xx and stm32l4xx. Other families should be supported soon. Once globally supported, this unique driver will also help reducing the impact of stm32 clock control heterogeneity in other drivers. Change-Id: Id15a8d0d44f03809b2907ef10d6877700459e674 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-01-23 17:45:42 +01:00
};
headers: Fix headers across the project Any word started with underscore followed by and uppercase letter or a second underscore is a reserved word according with C99. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-14 10:43:44 -07:00
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_STM32_CLOCK_CONTROL_H_ */
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