2017-05-09 14:29:01 +02:00
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/*
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* Copyright (c) 2016 Open-RnD Sp. z o.o.
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* Copyright (c) 2016 BayLibre, SAS
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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2019-06-25 15:53:57 -04:00
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#include <drivers/pinmux.h>
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2019-06-25 12:26:23 -04:00
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#include <sys/sys_io.h>
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2017-05-09 14:29:01 +02:00
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2017-08-30 08:35:38 -05:00
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#include <pinmux/stm32/pinmux_stm32.h>
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2017-05-09 14:29:01 +02:00
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/* pin assignments for STM32L476G-DISCO board */
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static const struct pin_config pinconf[] = {
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2020-05-13 08:29:40 +02:00
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay) && CONFIG_SERIAL
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2017-05-09 14:29:01 +02:00
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{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_USART1_TX},
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{STM32_PIN_PG10, STM32L4X_PINMUX_FUNC_PG10_USART1_RX},
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2020-04-16 14:15:44 +02:00
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#endif
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2020-05-13 08:29:40 +02:00
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay) && CONFIG_SERIAL
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2017-05-09 14:29:01 +02:00
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{STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PD6, STM32L4X_PINMUX_FUNC_PD6_USART2_RX},
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2020-04-16 14:15:44 +02:00
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#endif
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2020-05-13 08:29:40 +02:00
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) && CONFIG_SERIAL
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2018-09-13 16:51:40 +02:00
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{STM32_PIN_PG7, STM32L4X_PINMUX_FUNC_PG7_LPUART1_TX},
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{STM32_PIN_PG8, STM32L4X_PINMUX_FUNC_PG8_LPUART1_RX},
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2020-04-16 14:15:44 +02:00
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#endif
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2020-05-13 08:34:50 +02:00
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && CONFIG_I2C
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2017-05-09 14:29:01 +02:00
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{STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL},
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{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA},
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2020-04-13 16:02:48 +02:00
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#endif
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2020-05-13 08:32:27 +02:00
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
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2018-09-13 16:51:40 +02:00
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{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
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{STM32_PIN_PB4, STM32L4X_PINMUX_FUNC_PB4_SPI1_MISO},
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{STM32_PIN_PB5, STM32L4X_PINMUX_FUNC_PB5_SPI1_MOSI},
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2020-04-16 20:52:22 +02:00
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#endif
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2020-05-13 08:39:21 +02:00
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pwm2), okay) && CONFIG_PWM
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2017-05-09 14:29:01 +02:00
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{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1},
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2020-05-01 16:13:37 +02:00
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#endif
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2020-05-13 08:54:49 +02:00
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdmmc1), okay) && \
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CONFIG_DISK_ACCESS_STM32_SDMMC
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2020-04-24 12:37:33 +02:00
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{STM32_PIN_PC8, STM32L4X_PINMUX_FUNC_PC8_SDMMC1_D0},
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{STM32_PIN_PC9, STM32L4X_PINMUX_FUNC_PC9_SDMMC1_D1},
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{STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SDMMC1_D2},
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{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SDMMC1_D3},
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{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SDMMC1_CK},
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{STM32_PIN_PD2, STM32L4X_PINMUX_FUNC_PD2_SDMMC1_CMD},
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#endif
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2017-05-09 14:29:01 +02:00
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};
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static int pinmux_stm32_init(struct device *port)
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{
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ARG_UNUSED(port);
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stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
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return 0;
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}
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SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
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CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
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