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kconfig: Clean up header comments and make them consistent Use this short header style in all Kconfig files: # <description> # <copyright> # <license> ... Also change all <description>s from # Kconfig[.extension] - Foo-related options to just # Foo-related options It's clear enough that it's about Kconfig. The <description> cleanup was done with this command, along with some manual cleanup (big letter at the start, etc.) git ls-files '*Kconfig*' | \ xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /' Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 13:45:29 +01:00
# Clock controller driver configuration options
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-21 21:16:01 -05:00
# Copyright (c) 2015 Intel Corporation
license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-18 17:01:01 -08:00
# SPDX-License-Identifier: Apache-2.0
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-21 21:16:01 -05:00
#
# Clock controller drivers
#
menuconfig CLOCK_CONTROL
drivers: kconfig: unify menuconfig title strings Unify the drivers/*/Kconfig menuconfig title strings to the format "<class> [(acronym)] [bus] drivers". Including both the full name of the driver class and an acronym makes menuconfig more user friendly as some of the acronyms are less well-known than others. It also improves Kconfig search, both via menuconfig and via the generated Kconfig documentation. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-27 14:55:23 +02:00
bool "Clock controller drivers"
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-21 21:16:01 -05:00
help
Enable support for hardware clock controller. Such hardware can
provide clock for other subsystem, and thus can be also used for
power efficiency by controlling their clock. Note that this has
nothing to do with RTC.
clock_control/Kconfig: move quark_se entries to separate file Move quark_se clock control entries to separate file. This will help to keep things organized once we add more clock control drivers. Change-Id: Id8f4a94189ab5bbba9b6552777549cf426d79273 Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-05 18:05:57 +01:00
if CLOCK_CONTROL
drivers: clock_control: Refactor drivers to use shared init priority Refactors all of the clock control drivers to use a shared driver class initialization priority configuration, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, to allow configuring clock control drivers separately from other devices. This is similar to other driver classes like I2C and SPI. Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_OBJECTS or CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new option is the lower of the two, which means earlier initialization. The even lower defaults for STM32 and Arm Beetle are preserved by SoC-family level overrides. Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-10-18 14:45:17 -05:00
config CLOCK_CONTROL_INIT_PRIORITY
int "Clock control init priority"
default KERNEL_INIT_PRIORITY_OBJECTS
help
Clock control driver device initialization priority.
drivers: clock_control: move to new logger Move to new logger subsystem. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-17 12:21:21 -05:00
module = CLOCK_CONTROL
module-str = clock control
source "subsys/logging/Kconfig.template.log_config"
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-21 21:16:01 -05:00
drivers: clock control: rename Kconfig.nrf5 to Kconfig.nrf Renaming Kconfig.nrf5 to Kconfig.nrf in the wake of extending the use of the nRF clock control driver to both nRF5 and nRF91 SOC series. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-01-15 11:00:25 +01:00
source "drivers/clock_control/Kconfig.nrf"
clock/stm32: add STM32F107 reset and clock control Change-Id: If2280187c866c130212ea22c3d406501f37133b2 Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2016-10-28 12:46:50 +02:00
clock control:stm32: provide STM32Cube LL based driver This new clock control driver aims at providing a lightweight generic driver to the whole stm32 family. Driver is based on LL Cube API and hence is for now available only for STM32 supporting this API: stm32f3xx and stm32l4xx. Other families should be supported soon. Once globally supported, this unique driver will also help reducing the impact of stm32 clock control heterogeneity in other drivers. Change-Id: Id15a8d0d44f03809b2907ef10d6877700459e674 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-01-23 17:45:42 +01:00
source "drivers/clock_control/Kconfig.stm32"
clock_control: Add Beetle clock_control This patch adds the clock_control implementation for the ARM LTD Beetle platform. The main features enabled are: * Clock on and off in ACTIVE, SLEEP and DEEPSLEEP mode. * PLL support (freq: 12, 36, 48 Mhz). The integration with the existing drivers will be done in future patches. Jira: ZEP-1300 Change-Id: I07cb2325275bd86a036e8e24aeb7bbf2c6176a93 Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2016-11-03 11:12:06 +00:00
source "drivers/clock_control/Kconfig.beetle"
drivers: clock_control: Introduce bl60x clock driver This introduces a clock_control driver for bl60x Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-05-19 23:02:55 +02:00
source "drivers/clock_control/Kconfig.bflb"
drivers: clock_control: Add clock_fixed_rate driver Add fixed-clock clock control driver. This is a first step towards making fixed-clocks a first-class citizen in the clock control framework. Since the change is hidden behind a Kconfig enable this is opt-in for now. Signed-off-by: Moritz Fischer <moritzf@google.com>
2022-06-09 12:27:44 -07:00
source "drivers/clock_control/Kconfig.fixed"
drivers: clock_control: lpc11u6x: Add support for clock controller This commit adds basic support for the clock controller used in lpc11u6x MCUs. Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com> Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-03-31 16:45:26 +02:00
source "drivers/clock_control/Kconfig.lpc11u6x"
clock_control: Introduce mcux ccm driver Adds a new clock control driver for i.MX SoCs that have the clock control module (CCM). Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-08-28 14:09:55 -05:00
source "drivers/clock_control/Kconfig.mcux_ccm"
drivers: clock_control: add ccm driver for rt117x - add ccm driver for rt117x Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
2020-12-04 10:10:25 +08:00
source "drivers/clock_control/Kconfig.mcux_ccm_rev2"
drivers: clock_control: mcux_mcg: add driver for NXP Kinetis MCG Add driver shim for the NXP Kinetis Multipurpose Clock Generator (MCG) module. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-05-19 23:39:32 +02:00
source "drivers/clock_control/Kconfig.mcux_mcg"
clock_control: introduce mcux pcc driver Add a new clock control driver for NXP Kinetis SoCs that have the Peripheral Clock Controller module (PCC). Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-05-03 09:11:26 +02:00
source "drivers/clock_control/Kconfig.mcux_pcc"
drivers: clock_control: mcux_scg: add NXP MCUX SCG clock control driver Add clock controller driver for the NXP Kinetis System Clock Generator (SCG) clock module. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-16 22:16:35 +02:00
source "drivers/clock_control/Kconfig.mcux_scg"
clock_control: Introduce mcux sim driver Adds a new clock control driver for Kinetis SoCs that have the system integration (SIM) module. This will allow mcux shim drivers, such as uart and i2c, to abstract the call to CLOCK_GetFreq() behind the clock_control interface and thus be reused for SoCs with different clock architectures. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-08-26 08:43:53 -05:00
source "drivers/clock_control/Kconfig.mcux_sim"
drivers: Add NXP LPC clock control driver Add clock control driver for NXP LPC devices that use the MCUX SDK drivers Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-08-26 06:36:41 -05:00
source "drivers/clock_control/Kconfig.mcux_syscon"
drivers: clock: ti: Add initial support TI MSPM0 clock module Add initial support TI MSPM0 clock module Signed-off-by: Saravanan Sekar <saravanan@linumiz.com> Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-04-13 10:29:18 +05:30
source "drivers/clock_control/Kconfig.mspm0"
drivers: clock_control: add npcm clock control driver Add npcm clock control driver. Signed-off-by: James Chiang <cpchiang1@nuvoton.com> Signed-off-by: Joseph Liu <kwliu@nuvoton.com> Signed-off-by: Alan Yang <tyang1@nuvoton.com>
2024-05-22 19:39:21 -07:00
source "drivers/clock_control/Kconfig.npcm"
driver: clock: Add clock controller support in NPCX series. Add clock controller support for Nuvoton NPCX series. This CL includes: 1. Add clock controller device tree declarations. 2. Introduce clock-cells in yaml file clock tree to get module's source clock and turn off/on the its clock 3. Clock controller driver implementation. Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-07-02 15:44:38 +08:00
source "drivers/clock_control/Kconfig.npcx"
clock_control: RV32M1: introduce PCC driver / DT bindings Add a Peripheral Clock Controller (PCC) driver. This gates and ungates clocks to various peripherals on the SoC. Signed-off-by: Michael Scott <mike@foundries.io> Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-07 10:13:52 -08:00
source "drivers/clock_control/Kconfig.rv32m1"
driver: clock_control: Add clock controller initial version of RTS5912. Add clock controller driver for Realtek RTS5912. Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2024-11-22 17:01:05 +08:00
source "drivers/clock_control/Kconfig.rts5912"
drivers: esp32/clock_control: Add Clock Driver - Support PLL for Higher Frequencies 80,160,240 MHz - Support XTAL Frequencies 26MHz, 40MHz - Clock Driver can't be disabled, because all of the other drivers will depend on it to get their operating Frequency based on chosen clock source (XTAL/PLL). - Add needed references to BBPLL i2c bus ROM functions. - Add `rtc` node to Device Tree. - Since All Peripherals Frequency is depending on CPU_CLK Source, `clock-source` property added to CPU node Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-05-23 15:46:29 +02:00
source "drivers/clock_control/Kconfig.esp32"
drivers: clock control: Add LiteX clock control driver This commit adds LiteX SoC Builder clock control driver for MMCM module. It gives ability to change frequency, phase and duty cycle on up to 7 clock outputs. Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-05-11 13:48:44 +02:00
source "drivers/clock_control/Kconfig.litex"
drivers: clock_control: add R-Car CPG MSSR driver Clock Pulse Generator, Module Standby Software Reset, are registers presents in Renesas Gen3 SoC series. MSSR is used to supply clock to the different modules, shuch as timer, or UART, it's also possible to issue a reset the different module. CPG registers allow to get the rate or to set some divider like for the CAN clock. Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-01-15 16:10:46 +01:00
source "drivers/clock_control/Kconfig.rcar"
Microchip: MEC172x clock control driver Implement a clock control driver for Microchip MEC172x handling configuring the 32 KHz input sources for the PLL and peripheral-32k clock domains. MEC172x differs from MEC152x. MEC152x had one 32K source for both PLL and peripherals. MEC172x allows the two domains to use independent 32 KHz sources. Device tree updated to provide addresses of hardware used by the driver. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-07-19 14:14:20 -04:00
source "drivers/clock_control/Kconfig.xec"
drivers: clock_control: Add Infineon CAT1 clock control driver Add initial version of Infineon CAT1 clock control driver. - supports clock initialization based on board DT configuration. Added initial version of system_clocks.dtsi for Infineon PSoC 6 SOC. Includes: clk_imo, path_mux0..4, fll0, pll0, clk_hf0..4, clk_fast, clk_slow and clk_peri. Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2023-02-23 14:04:04 +02:00
source "drivers/clock_control/Kconfig.ifx_cat1"
drivers/clock_control: Add cAVS clock driver Simple driver that allows one to choose the clock speed of xtensa cores. It's basically a shim layer on top of SOC level driver. Also, a really simple test case was added, mainly to ensure things are build and are sane. Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-14 14:55:21 -07:00
source "drivers/clock_control/Kconfig.cavs"
drivers: clock_control: add Aspeed AST10x0 clock control AST10x0 series SOCs provide the clock controller through the syscon hardware block. The current driver supports the clock gating capability for the hardware IPs embedded in the SOC. Each clock source has a clock ID that can simply map to a bit in syscon registers CLK_STOP_CTRL0 (group 0) or CLK_STOP_CTRL1 (group 1). There are some clock sources that don't have associated clock gating control, which are always on, are grouped to into group 2. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
2022-07-22 11:26:28 +08:00
source "drivers/clock_control/Kconfig.aspeed"
drivers: clock_control: gd32: initial support This patch adds a clock control driver for GD32 platforms. It is important to note that the driver is only able to handle peripheral clocks, but not "system clocks" (e.g. PLL settings, SYS_CK, etc.). On some similar platforms (STM32) this task is embedded in the same clock driver, performed at init time but with no options to do any manipulation at runtime via the API calls. The clock control API as-is is really orthogonal to "system clocks", and it is arguably a bad idea to embed system clock init code in a clock control driver. It can be done at SoC level still using Devicetree as a source of hardware description/initial configuration. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-03 19:06:27 +02:00
source "drivers/clock_control/Kconfig.gd32"
drivers: clock: Add Atmel SAM PMC driver Add initial version of clock control for Atmel SAM SoC series. This add support to Power Management which allows control peripherals clock. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-05 22:03:59 +01:00
source "drivers/clock_control/Kconfig.sam"
drivers: clock_control: Add initial SiM3U1xx support This serves two main purposes: - change the CPU clock via devicetree nodes - provide the APB frequency to device drivers via the clock driver interface Theoretically this could also support choosing between the available clock sources, but right now we only support LPOSC0 going into PLL0, going into AHB. Turning the PLL back off is also not supported since the only current use case is to set the PLL frequency, turn it on, and switch the AHB over to it. Signed-off-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net>
2023-05-14 08:59:19 +02:00
source "drivers/clock_control/Kconfig.si32"
drivers: clock_control: smartbond: initial support This commit adds basic support for the clock controller used in SmartBond MCUs. Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2022-11-17 14:10:37 +01:00
source "drivers/clock_control/Kconfig.smartbond"
drivers: clock_control: add support for Nuvoton numaker series CLK Add Nuvoton numaker series clock controller support, including: 1. Do system clock initialization in z_arm_platform_init(). 2. Support peripheral clock control API equivalent to BSP CLK_EnableModuleClock()/CLK_SetModuleClock(). Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-03-03 18:11:00 +08:00
source "drivers/clock_control/Kconfig.numaker"
drivers: clock_control: add NXP S32 driver The clock controller is a singleton controller for all the system-level clocks (XOSC, PLL, CGM, etc) to provide run-time information to the peripheral device drivers about the module's clocks. Clock configuration is not yet supported. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-05-26 00:00:00 +00:00
source "drivers/clock_control/Kconfig.nxp_s32"
drivers: clock_control: clock driver for Intel Agilex5 platform This is Intel's proprietary IP which supply the clock for all the system peripherals. Clock manager is initialized only one time during boot up by FSBL (ATF BL2) based on external user settings. Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-06 14:09:24 +00:00
source "drivers/clock_control/Kconfig.agilex5"
dts: bindings: clock: Change clock control binding for Renesas RA Background of this modification is to make clock control driver code provided by Renesas vendor to support for Renesas MCU on Zephyr. Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2024-06-20 09:49:31 +00:00
source "drivers/clock_control/Kconfig.renesas_ra_cgc"
driver: clock: Update clock control driver for RA8 This update is to support clock API for RA8 Move the clock initialize function into clock driver Peripheral clock now has 2 more property in clock cell for enable and disable clock to peripheral module Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
2024-06-18 10:24:42 +07:00
drivers: clock: Support clock control driver RX MCU Initial support of clock control driver for RX MCU Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com> Signed-off-by: Tran Van Quy <quy.tran.pz@renesas.com>
2024-11-04 14:33:06 +07:00
source "drivers/clock_control/Kconfig.renesas_rx_cgc"
drivers: clock control: Initial support for RZ/G3S Add Clock Control driver support for Renesas RZ/G3S Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com> Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2024-12-16 15:28:03 +07:00
source "drivers/clock_control/Kconfig.renesas_rz_cpg"
drivers: Add MAX32690 clock control driver Clock control for MAX32690 Co-authored-by: Okan Sahin <okan.sahin@analog.com> Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2023-10-13 16:04:13 +03:00
source "drivers/clock_control/Kconfig.max32"
drivers: clock_control: Add Ambiq clock_control driver. This commit adds Ambiq clock_control driver support. Signed-off-by: Aaron Ye <aye@ambiq.com>
2023-11-04 08:26:51 +08:00
source "drivers/clock_control/Kconfig.ambiq"
drivers: clock_control: Add PWM clock device Adds a clock control device for a PWM node, allowing the PWM to be controlled using the clock control API. It is a similar idea to the device driver in linux: linux/Documentation/devicetree/bindings/clock/pwm-clock.yaml Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-06-11 17:07:42 -04:00
source "drivers/clock_control/Kconfig.pwm"
drivers: clock_control: Added clock driver for Raspberry Pi Pico Added clock driver for Raspberry Pi Pico platform Signed-off-by: Andrei-Edward Popa <andrei.popa105@yahoo.com> Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2023-03-18 22:59:40 +02:00
source "drivers/clock_control/Kconfig.rpi_pico"
drivers: clock_control: nrf_auxpll: add initial driver Add a new driver for the AUXPLL peripheral found in some new Nordic SoCs, e.g. nRF54H20. AUXPLL is used to clock some peripherals like e.g. CAN. Note that driver is implemented natively as Nordic HAL lacks definitions for the AUXPLL IP, this may be changed once these become available. Note that usage of nrf_auxpll_config_set generates unnecessary extra assembly code compared to the proposed API in https://github.com/zephyrproject-rtos/hal_nordic/pull/185 which guarantees static initialization and single write access, possible in the Zephyr context. However, current solution has been enforced until further discussion on raw access APIs takes place. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-04-29 13:20:27 +02:00
source "drivers/clock_control/Kconfig.nrf_auxpll"
firmware: scmi: add support for clock management protocol This includes: 1) Source containing helper functions, each implementing a command from the clock management protocol. 2) A clock controller driver making use of said helper functions and implementing the clock subsystem API. 3) A DT binding for clock protocol node. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-08-07 11:05:12 +03:00
source "drivers/clock_control/Kconfig.arm_scmi"
drivers: clock_control: silabs: Add clock control driver Add clock control driver for Silicon Labs Series 2 and newer. Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2024-09-20 16:07:55 +02:00
source "drivers/clock_control/Kconfig.silabs"
drivers: clock: Add dumb clock driver for SiWx91x This driver is mostly the initial seed for further implementation of a real clock driver. It doesn't allow the user to choose the clock source for the various peripherals. The driver hardcodes some sane values. Note that for now, the driver snps,designware-i2c does not support "clocks" attribute. So this patch hardcode the clock configuration in the init of the clock driver. Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-01-29 22:12:19 +01:00
source "drivers/clock_control/Kconfig.siwx91x"
drivers: add the ch32v00x clock controller This commit adds the clock driver for WCH CH32V003. Signed-off-by: Michael Hope <michaelh@juju.nz> Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
2024-06-01 21:53:41 +05:30
source "drivers/clock_control/Kconfig.wch_rcc"
drivers/clock: Add clock drivers of it51xxx Add clock drivers for ITE it51xxx series. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2024-11-21 17:19:10 +08:00
source "drivers/clock_control/Kconfig.it51xxx"
clock_control/Kconfig: move quark_se entries to separate file Move quark_se clock control entries to separate file. This will help to keep things organized once we add more clock control drivers. Change-Id: Id8f4a94189ab5bbba9b6552777549cf426d79273 Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-05 18:05:57 +01:00
endif # CLOCK_CONTROL
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