zephyr/arch/arm/core/mmu/CMakeLists.txt

# SPDX-License-Identifier: Apache-2.0

zephyr_library()

zephyr_library_sources(arm_mmu.c)
arch: arm: core: aarch32: introduce basic ARMv7 MMU support An initial implementation for memory management using the ARMv7 MMU. A single L1 translation table for the whole 4 GB address space is al- ways present, a configurable number of L2 page tables are linked to the L1 table based on the static memory area configuration at boot time, or whenever arch_mem_map/arch_mem_unmap are called at run-time. Currently, a CPU with the Multiprocessor Extensions and execution at PL1 are always assumed. Userspace-related features or thread stack guard pages are not yet supported. Neither are LPAE, PXN or TEX re- mapping. All mappings are currently assigned to the same domain. Re- garding the permissions model, access permissions are specified using the AP[2:1] model rather than the older AP[2:0] model, which, accor- ding to ARM's documentation, is deprecated and should no longer be used. The newer model adds some complexity when it comes to mapping pages as unaccessible (the AP[2:1] model doesn't support explicit specification of "no R, no W" permissions, it's always at least "RO"), this is accomplished by invalidating the ID bits of the respective page's PTE. Includes sources, Kconfig integration, adjusted CMakeLists and the modified linker command file (proper section alignment!). Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com> 2021-07-15 10:33:58 +02:00			`# SPDX-License-Identifier: Apache-2.0`

			`zephyr_library()`

			`zephyr_library_sources(arm_mmu.c)`