In some Cortex-M3 implementations SCB_VTOR bit[29] is called the TBLBASE bit. This enables setting VTOR to an SRAM address for qemu_cortex_m3 Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com> |
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arc | ||
arm | ||
arm64 | ||
common | ||
mips | ||
nios2 | ||
posix | ||
riscv | ||
sparc | ||
x86 | ||
xtensa | ||
archs.yml | ||
CMakeLists.txt | ||
Kconfig | ||
Kconfig.v1 | ||
Kconfig.v2 |