e7c7f911a9
Reworked usart_sam driver to utilize new DT_INST macros as part of this rework we also now get pin ctrl/mux configuration information from the device tree instead of via Kconfig and defines in soc_pinmap.h We remove defines from dts_fixup.h and soc_pinmap.h and associated Kconfig symbols that are no longer needed due to getting all that information from devicetree. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
116 lines
4.3 KiB
C
116 lines
4.3 KiB
C
/*
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* Copyright (c) 2016-2017 Piotr Mienkowski
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* SPDX-License-Identifier: Apache-2.0
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*/
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/** @file
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* @brief Atmel SAM E70 MCU pin definitions.
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*
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* This file contains pin configuration data required by different MCU
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* modules to correctly configure GPIO controller.
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*/
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#ifndef _ATMEL_SAM_SOC_PINMAP_H_
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#define _ATMEL_SAM_SOC_PINMAP_H_
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#include <soc.h>
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/* Analog to Digital Converter (AFEC) */
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#define PIN_AFE0_ADTRG {PIO_PA8B_AFEC0_ADTRG, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
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#define PIN_AFE1_ADTRG {PIO_PD9C_AFEC1_ADTRG, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
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/* Ethernet MAC (GMAC) */
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#define PINS_GMAC_MASK (PIO_PD0A_GMAC_GTXCK | PIO_PD1A_GMAC_GTXEN \
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| PIO_PD2A_GMAC_GTX0 | PIO_PD3A_GMAC_GTX1 | PIO_PD4A_GMAC_GRXDV \
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| PIO_PD5A_GMAC_GRX0 | PIO_PD6A_GMAC_GRX1 | PIO_PD7A_GMAC_GRXER \
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| PIO_PD8A_GMAC_GMDC | PIO_PD9A_GMAC_GMDIO)
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#define PIN_GMAC_SET1 {PINS_GMAC_MASK, PIOD, ID_PIOD, SOC_GPIO_FUNC_A}
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#define PINS_GMAC0 {PIN_GMAC_SET1}
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/* Synchronous Serial Controller (SSC) */
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#define PIN_SSC0_RD {PIO_PA10C_SSC_RD, PIOA, ID_PIOA, SOC_GPIO_FUNC_C}
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#define PIN_SSC0_RF {PIO_PD24B_SSC_RF, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
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#define PIN_SSC0_RK {PIO_PA22A_SSC_RK, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#ifdef CONFIG_I2S_SAM_SSC_0_PIN_TD_PB5
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#define PIN_SSC0_TD {PIO_PB5D_SSC_TD, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
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#elif CONFIG_I2S_SAM_SSC_0_PIN_TD_PD10
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#define PIN_SSC0_TD {PIO_PD10C_SSC_TD, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
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#elif CONFIG_I2S_SAM_SSC_0_PIN_TD_PD26
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#define PIN_SSC0_TD {PIO_PD26B_SSC_TD, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
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#endif
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#define PIN_SSC0_TF {PIO_PB0D_SSC_TF, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
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#define PIN_SSC0_TK {PIO_PB1D_SSC_TK, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
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#define PINS_SSC0 {PIN_SSC0_RD, PIN_SSC0_RF, PIN_SSC0_RK, PIN_SSC0_TD, \
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PIN_SSC0_TF, PIN_SSC0_TK}
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/* Two-wire Interface (TWIHS) */
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#define PIN_TWIHS0_TWCK {PIO_PA4A_TWIHS0_TWCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_TWIHS0_TWD {PIO_PA3A_TWIHS0_TWD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PINS_TWIHS0 {PIN_TWIHS0_TWCK, PIN_TWIHS0_TWD}
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#define PIN_TWIHS1_TWCK {PIO_PB5A_TWIHS1_TWCK1, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
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#define PIN_TWIHS1_TWD {PIO_PB4A_TWIHS1_TWD1, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
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#define PINS_TWIHS1 {PIN_TWIHS1_TWCK, PIN_TWIHS1_TWD}
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#define PIN_TWIHS2_TWCK {PIO_PD28C_TWIHS2_TWCK2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
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#define PIN_TWIHS2_TWD {PIO_PD27C_TWIHS2_TWD2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
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#define PINS_TWIHS2 {PIN_TWIHS2_TWCK, PIN_TWIHS2_TWD}
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/* Serial Peripheral Interface (SPI) */
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#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS0_PB2
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#define PIN_SPI0_CS0 {PIO_PB2D_SPI0_NPCS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
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#endif
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#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PA31
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#define PIN_SPI0_CS1 {PIO_PA31A_SPI0_NPCS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#endif
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#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PD25
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#define PIN_SPI0_CS1 {PIO_PD25B_SPI0_NPCS1, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
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#endif
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#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PD12
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#define PIN_SPI0_CS2 {PIO_PD12C_SPI0_NPCS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
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#endif
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#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PD27
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#define PIN_SPI0_CS3 {PIO_PD27B_SPI0_NPCS3, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
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#endif
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#define PINS_SPI0_MASK \
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(PIO_PD20B_SPI0_MISO | PIO_PD21B_SPI0_MOSI | PIO_PD22B_SPI0_SPCK)
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#define PINS_SPI0 {PINS_SPI0_MASK, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
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#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS0_PC25
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#define PIN_SPI1_CS0 {PIO_PC25C_SPI1_NPCS0, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
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#endif
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#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS1_PC28
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#define PIN_SPI1_CS1_PC28 {PIO_PC28C_SPI1_NPCS1, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
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#endif
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#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS1_PD0
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#define PIN_SPI1_CS1_PD0 {PIO_PD0C_SPI1_NPCS1, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
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#endif
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#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS2_PC29
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#define PIN_SPI1_CS2_PC29 {PIO_PC29C_SPI1_NPCS2, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
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#endif
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#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS2_PD1
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#define PIN_SPI1_CS2_PD1 {PIO_PD1C_SPI1_NPCS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
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#endif
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#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS3_PC30
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#define PIN_SPI1_CS3_PC30 {PIO_PC30C_SPI1_NPCS3, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
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#endif
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#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS3_PD2
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#define PIN_SPI1_CS3_PD2 {PIO_PD2C_SPI1_NPCS3, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
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#endif
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#define PINS_SPI1_MASK \
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(PIO_PC26C_SPI1_MISO | PIO_PC27C_SPI1_MOSI | PIO_PC24C_SPI1_SPCK)
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#define PINS_SPI1 {PINS_SPI1_MASK, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
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#endif /* _ATMEL_SAM_SOC_PINMAP_H_ */
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