drivers: serial: usart_sam: rework device tree support
Reworked usart_sam driver to utilize new DT_INST macros as part of this rework we also now get pin ctrl/mux configuration information from the device tree instead of via Kconfig and defines in soc_pinmap.h We remove defines from dts_fixup.h and soc_pinmap.h and associated Kconfig symbols that are no longer needed due to getting all that information from devicetree. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala
Kumar Gala
parent
fa8aa11f71
commit
e7c7f911a9
11 changed files with 48 additions and 312 deletions
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@ -11,7 +11,6 @@ CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_USART_SAM=y
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CONFIG_USART_SAM_PORT_1=y
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CONFIG_BOARD_SAM_E70_XPLAINED=y
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CONFIG_WDT_DISABLE_AT_BOOT=y
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CONFIG_BUILD_OUTPUT_HEX=y
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@ -11,6 +11,5 @@ CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_USART_SAM=y
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CONFIG_USART_SAM_PORT_1=y
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CONFIG_BOARD_SAM_E70_XPLAINED=y
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CONFIG_BUILD_OUTPUT_HEX=y
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@ -11,5 +11,4 @@ CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_USART_SAM=y
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CONFIG_USART_SAM_PORT_1=y
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CONFIG_WDT_DISABLE_AT_BOOT=y
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@ -11,4 +11,3 @@ CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_USART_SAM=y
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CONFIG_USART_SAM_PORT_1=y
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@ -3,36 +3,10 @@
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# Copyright (c) 2016 Piotr Mienkowski
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# SPDX-License-Identifier: Apache-2.0
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menuconfig USART_SAM
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config USART_SAM
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bool "Atmel SAM MCU family USART driver"
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depends on SOC_FAMILY_SAM
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select SERIAL_HAS_DRIVER
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select SERIAL_SUPPORT_INTERRUPT
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help
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This option enables the USARTx driver for Atmel SAM MCUs.
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# ---------- Port 0 ----------
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config USART_SAM_PORT_0
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bool "Enable USART0"
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depends on USART_SAM
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help
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Enable USART0 at boot
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# ---------- Port 1 ----------
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config USART_SAM_PORT_1
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bool "Enable USART1"
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depends on USART_SAM
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help
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Enable USART1 at boot
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# ---------- Port 2 ----------
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config USART_SAM_PORT_2
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bool "Enable USART2"
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depends on USART_SAM
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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help
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Enable USART2 at boot
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@ -4,6 +4,8 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT atmel_sam_usart
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/** @file
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* @brief USART driver for Atmel SAM MCU family.
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*
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@ -19,34 +21,6 @@
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#include <soc.h>
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#include <drivers/uart.h>
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/*
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* Verify Kconfig configuration
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*/
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#if CONFIG_USART_SAM_PORT_0 == 1
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#if DT_USART_SAM_PORT_0_BAUD_RATE == 0
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#error "DT_USART_SAM_PORT_0_BAUD_RATE has to be bigger than 0"
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#endif
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#endif
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#if CONFIG_USART_SAM_PORT_1 == 1
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#if DT_USART_SAM_PORT_1_BAUD_RATE == 0
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#error "DT_USART_SAM_PORT_1_BAUD_RATE has to be bigger than 0"
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#endif
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#endif
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#if CONFIG_USART_SAM_PORT_2 == 1
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#if DT_USART_SAM_PORT_2_BAUD_RATE == 0
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#error "DT_USART_SAM_PORT_2_BAUD_RATE has to be bigger than 0"
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#endif
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#endif
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/* Device constant configuration parameters */
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struct usart_sam_dev_cfg {
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Usart *regs;
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@ -349,125 +323,53 @@ static const struct uart_driver_api usart_sam_driver_api = {
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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/* USART0 */
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#ifdef CONFIG_USART_SAM_PORT_0
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#define USART_SAM_DECLARE_CFG(n, IRQ_FUNC_INIT) \
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static const struct usart_sam_dev_cfg usart##n##_sam_config = { \
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.regs = (Usart *)DT_INST_REG_ADDR(n), \
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.periph_id = DT_INST_PROP(n, peripheral_id), \
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\
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.pin_rx = ATMEL_SAM_DT_PIN(n, 0), \
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.pin_tx = ATMEL_SAM_DT_PIN(n, 1), \
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\
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IRQ_FUNC_INIT \
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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/* Forward declare function */
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static void usart0_sam_irq_config_func(struct device *port);
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static const struct usart_sam_dev_cfg usart0_sam_config = {
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.regs = USART0,
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.periph_id = DT_USART_SAM_PORT_0_PERIPHERAL_ID,
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.pin_rx = PIN_USART0_RXD,
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.pin_tx = PIN_USART0_TXD,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = usart0_sam_irq_config_func,
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#endif
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};
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static struct usart_sam_dev_data usart0_sam_data = {
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.baud_rate = DT_USART_SAM_PORT_0_BAUD_RATE,
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};
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DEVICE_AND_API_INIT(usart0_sam, DT_USART_SAM_PORT_0_NAME, &usart_sam_init,
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&usart0_sam_data, &usart0_sam_config, PRE_KERNEL_1,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &usart_sam_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void usart0_sam_irq_config_func(struct device *port)
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{
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IRQ_CONNECT(DT_USART_SAM_PORT_0_IRQ,
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DT_USART_SAM_PORT_0_IRQ_PRIO,
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usart_sam_isr,
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DEVICE_GET(usart0_sam), 0);
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irq_enable(DT_USART_SAM_PORT_0_IRQ);
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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#define USART_SAM_CONFIG_FUNC(n) \
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static void usart##n##_sam_irq_config_func(struct device *port) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), \
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DT_INST_IRQ(n, priority), \
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usart_sam_isr, \
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DEVICE_GET(usart##n##_sam), 0); \
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irq_enable(DT_INST_IRQN(n)); \
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}
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#define USART_SAM_IRQ_CFG_FUNC_INIT(n) \
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.irq_config_func = usart##n##_sam_irq_config_func
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#define USART_SAM_INIT_CFG(n) \
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USART_SAM_DECLARE_CFG(n, USART_SAM_IRQ_CFG_FUNC_INIT(n))
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#else
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#define USART_SAM_CONFIG_FUNC(n)
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#define USART_SAM_IRQ_CFG_FUNC_INIT
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#define USART_SAM_INIT_CFG(n) \
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USART_SAM_DECLARE_CFG(n, USART_SAM_IRQ_CFG_FUNC_INIT)
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#endif
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/* USART1 */
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#define USART_SAM_INIT(n) \
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static struct usart_sam_dev_data usart##n##_sam_data = { \
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.baud_rate = DT_INST_PROP(n, current_speed), \
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}; \
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\
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static const struct usart_sam_dev_cfg usart##n##_sam_config; \
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\
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DEVICE_AND_API_INIT(usart##n##_sam, DT_INST_LABEL(n), \
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&usart_sam_init, &usart##n##_sam_data, \
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&usart##n##_sam_config, PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&usart_sam_driver_api); \
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\
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USART_SAM_CONFIG_FUNC(n) \
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\
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USART_SAM_INIT_CFG(n)
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#ifdef CONFIG_USART_SAM_PORT_1
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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/* Forward declare function */
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static void usart1_sam_irq_config_func(struct device *port);
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static const struct usart_sam_dev_cfg usart1_sam_config = {
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.regs = USART1,
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.periph_id = DT_USART_SAM_PORT_1_PERIPHERAL_ID,
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.pin_rx = PIN_USART1_RXD,
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.pin_tx = PIN_USART1_TXD,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = usart1_sam_irq_config_func,
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#endif
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};
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static struct usart_sam_dev_data usart1_sam_data = {
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.baud_rate = DT_USART_SAM_PORT_1_BAUD_RATE,
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};
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DEVICE_AND_API_INIT(usart1_sam, DT_USART_SAM_PORT_1_NAME, &usart_sam_init,
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&usart1_sam_data, &usart1_sam_config, PRE_KERNEL_1,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &usart_sam_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void usart1_sam_irq_config_func(struct device *port)
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{
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IRQ_CONNECT(DT_USART_SAM_PORT_1_IRQ,
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DT_USART_SAM_PORT_1_IRQ_PRIO,
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usart_sam_isr,
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DEVICE_GET(usart1_sam), 0);
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irq_enable(DT_USART_SAM_PORT_1_IRQ);
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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#endif
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/* USART2 */
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#ifdef CONFIG_USART_SAM_PORT_2
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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/* Forward declare function */
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static void usart2_sam_irq_config_func(struct device *port);
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static const struct usart_sam_dev_cfg usart2_sam_config = {
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.regs = USART2,
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.periph_id = DT_USART_SAM_PORT_2_PERIPHERAL_ID,
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.pin_rx = PIN_USART2_RXD,
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.pin_tx = PIN_USART2_TXD,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = usart2_sam_irq_config_func,
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#endif
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};
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static struct usart_sam_dev_data usart2_sam_data = {
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.baud_rate = DT_USART_SAM_PORT_2_BAUD_RATE,
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};
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DEVICE_AND_API_INIT(usart2_sam, DT_USART_SAM_PORT_2_NAME, &usart_sam_init,
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&usart2_sam_data, &usart2_sam_config, PRE_KERNEL_1,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &usart_sam_driver_api);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void usart2_sam_irq_config_func(struct device *port)
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{
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IRQ_CONNECT(DT_USART_SAM_PORT_2_IRQ,
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DT_USART_SAM_PORT_2_IRQ_PRIO,
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usart_sam_isr,
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DEVICE_GET(usart2_sam), 0);
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irq_enable(DT_USART_SAM_PORT_2_IRQ);
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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#endif
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DT_INST_FOREACH(USART_SAM_INIT)
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@ -15,44 +15,6 @@
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#include <soc.h>
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/* Universal Synchronous Asynchronous Receiver Transmitter (USART) */
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#define PIN_USART0_RXD {PIO_PA10A_RXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART0_TXD {PIO_PA11A_TXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART0_CTS {PIO_PB26A_CTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
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#define PIN_USART0_RTS {PIO_PB25A_RTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
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#define PIN_USART0_SCK {PIO_PA17B_SCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
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#define PINS_USART0 {PIN_USART0_RXD, PIN_USART0_TXD, PIN_USART0_CTS, \
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PIN_USART0_RTS, PIN_USART0_SCK}
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#define PIN_USART1_RXD {PIO_PA12A_RXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_TXD {PIO_PA13A_TXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_CTS {PIO_PA15A_CTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_RTS {PIO_PA14A_RTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_SCK {PIO_PA16A_SCK1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PINS_USART1 {PIN_USART1_RXD, PIN_USART1_TXD, PIN_USART1_CTS, \
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PIN_USART1_RTS, PIN_USART1_SCK}
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#define PIN_USART2_RXD {PIO_PB21A_RXD2, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
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#define PIN_USART2_TXD {PIO_PB20A_TXD2, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
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#define PIN_USART2_CTS {PIO_PB23A_CTS2, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
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#define PIN_USART2_RTS {PIO_PB22A_RTS2, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
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#define PIN_USART2_SCK {PIO_PB24A_SCK2, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
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#define PINS_USART2 {PIN_USART2_RXD, PIN_USART2_TXD, PIN_USART2_CTS, \
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PIN_USART2_RTS, PIN_USART2_SCK}
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#define PIN_USART3_RXD {PIO_PD5B_RXD3, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
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#define PIN_USART3_TXD {PIO_PD4B_TXD3, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
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#define PIN_USART3_CTS {PIO_PF4A_CTS3, PIOF, ID_PIOF, SOC_GPIO_FUNC_A}
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#define PIN_USART3_RTS {PIO_PF5A_RTS3, PIOF, ID_PIOF, SOC_GPIO_FUNC_A}
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#define PIN_USART3_SCK {PIO_PE16B_SCK3, PIOE, ID_PIOE, SOC_GPIO_FUNC_B}
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#define PINS_USART3 {PIN_USART3_RXD, PIN_USART3_TXD, PIN_USART3_CTS, \
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PIN_USART3_RTS, PIN_USART3_SCK}
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/* Two-wire Interface (TWI) */
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#define PIN_TWI0_TWCK {PIO_PA18A_TWCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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@ -17,26 +17,6 @@
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#include <soc.h>
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/* Universal Synchronous Asynchronous Receiver Transmitter (USART) */
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#define PIN_USART0_RXD {PIO_PB0C_RXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
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#define PIN_USART0_TXD {PIO_PB1C_TXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
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#define PIN_USART0_CTS {PIO_PB2C_CTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
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#define PIN_USART0_RTS {PIO_PB3C_RTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
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#define PIN_USART0_SCK {PIO_PB13C_SCK0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
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#define PINS_USART0 {PIN_USART0_RXD, PIN_USART0_TXD, PIN_USART0_CTS, \
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PIN_USART0_RTS, PIN_USART0_SCK}
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#define PIN_USART1_RXD {PIO_PA21A_RXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_TXD {PIO_PA22A_TXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_CTS {PIO_PA25A_CTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_RTS {PIO_PA24A_RTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_SCK {PIO_PA23A_SCK1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PINS_USART1 {PIN_USART1_RXD, PIN_USART1_TXD, PIN_USART1_CTS, \
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PIN_USART1_RTS, PIN_USART1_SCK}
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/* Two-wire Interface (TWI) */
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#define PIN_TWI0_TWCK {PIO_PA4A_TWCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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@ -16,26 +16,6 @@
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#include <soc.h>
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/* Universal Synchronous Asynchronous Receiver Transmitter (USART) */
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#define PIN_USART0_RXD {PIO_PA5A_RXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART0_TXD {PIO_PA6A_TXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART0_CTS {PIO_PA8A_CTS0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART0_RTS {PIO_PA7A_RTS0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART0_SCK {PIO_PA2B_SCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
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#define PINS_USART0 {PIN_USART0_RXD, PIN_USART0_TXD, PIN_USART0_CTS, \
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PIN_USART0_RTS, PIN_USART0_SCK}
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#define PIN_USART1_RXD {PIO_PA21A_RXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_TXD {PIO_PA22A_TXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_CTS {PIO_PA25A_CTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_RTS {PIO_PA24A_RTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PIN_USART1_SCK {PIO_PA23A_SCK1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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#define PINS_USART1 {PIN_USART1_RXD, PIN_USART1_TXD, PIN_USART1_CTS, \
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PIN_USART1_RTS, PIN_USART1_SCK}
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/* Two-wire Interface (TWI) */
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#define PIN_TWI0_TWCK {PIO_PA4A_TWCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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|
|
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@ -30,35 +30,6 @@
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#define PINS_GMAC0 {PIN_GMAC_SET1}
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/* Universal Synchronous Asynchronous Receiver Transmitter (USART) */
|
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#define PIN_USART0_RXD {PIO_PB0C_USART0_RXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
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||||
#define PIN_USART0_TXD {PIO_PB1C_USART0_TXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
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#define PIN_USART0_CTS {PIO_PB2C_USART0_CTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
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#define PIN_USART0_RTS {PIO_PB3C_USART0_RTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
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#define PIN_USART0_SCK {PIO_PB13C_USART0_SCK0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
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|
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#define PINS_USART0 {PIN_USART0_RXD, PIN_USART0_TXD, PIN_USART0_CTS, \
|
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PIN_USART0_RTS, PIN_USART0_SCK}
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|
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#define PIN_USART1_RXD {PIO_PA21A_USART1_RXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
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||||
#define PIN_USART1_TXD {PIO_PB4D_USART1_TXD1, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
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||||
#define PIN_USART1_CTS {PIO_PA25A_USART1_CTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
|
||||
#define PIN_USART1_RTS {PIO_PA24A_USART1_RTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
|
||||
#define PIN_USART1_SCK {PIO_PA23A_USART1_SCK1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
|
||||
|
||||
#define PINS_USART1 {PIN_USART1_RXD, PIN_USART1_TXD, PIN_USART1_CTS, \
|
||||
PIN_USART1_RTS, PIN_USART1_SCK}
|
||||
|
||||
#define PIN_USART2_RXD {PIO_PD15B_USART2_RXD2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
|
||||
#define PIN_USART2_TXD {PIO_PD16B_USART2_TXD2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
|
||||
#define PIN_USART2_CTS {PIO_PD19B_USART2_CTS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
|
||||
#define PIN_USART2_RTS {PIO_PD18B_USART2_RTS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
|
||||
#define PIN_USART2_SCK {PIO_PD17B_USART2_SCK2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
|
||||
|
||||
#define PINS_USART2 {PIN_USART2_RXD, PIN_USART2_TXD, PIN_USART2_CTS, \
|
||||
PIN_USART2_RTS, PIN_USART2_SCK}
|
||||
|
||||
/* Synchronous Serial Controller (SSC) */
|
||||
|
||||
#define PIN_SSC0_RD {PIO_PA10C_SSC_RD, PIOA, ID_PIOA, SOC_GPIO_FUNC_C}
|
||||
|
|
|
|||
|
|
@ -31,35 +31,6 @@
|
|||
|
||||
#define PINS_GMAC0 {PIN_GMAC_SET1}
|
||||
|
||||
/* Universal Synchronous Asynchronous Receiver Transmitter (USART) */
|
||||
|
||||
#define PIN_USART0_RXD {PIO_PB0C_USART0_RXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
|
||||
#define PIN_USART0_TXD {PIO_PB1C_USART0_TXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
|
||||
#define PIN_USART0_CTS {PIO_PB2C_USART0_CTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
|
||||
#define PIN_USART0_RTS {PIO_PB3C_USART0_RTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
|
||||
#define PIN_USART0_SCK {PIO_PB13C_USART0_SCK0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
|
||||
|
||||
#define PINS_USART0 {PIN_USART0_RXD, PIN_USART0_TXD, PIN_USART0_CTS, \
|
||||
PIN_USART0_RTS, PIN_USART0_SCK}
|
||||
|
||||
#define PIN_USART1_RXD {PIO_PA21A_USART1_RXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
|
||||
#define PIN_USART1_TXD {PIO_PB4D_USART1_TXD1, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
|
||||
#define PIN_USART1_CTS {PIO_PA25A_USART1_CTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
|
||||
#define PIN_USART1_RTS {PIO_PA24A_USART1_RTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
|
||||
#define PIN_USART1_SCK {PIO_PA23A_USART1_SCK1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
|
||||
|
||||
#define PINS_USART1 {PIN_USART1_RXD, PIN_USART1_TXD, PIN_USART1_CTS, \
|
||||
PIN_USART1_RTS, PIN_USART1_SCK}
|
||||
|
||||
#define PIN_USART2_RXD {PIO_PD15B_USART2_RXD2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
|
||||
#define PIN_USART2_TXD {PIO_PD16B_USART2_TXD2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
|
||||
#define PIN_USART2_CTS {PIO_PD19B_USART2_CTS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
|
||||
#define PIN_USART2_RTS {PIO_PD18B_USART2_RTS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
|
||||
#define PIN_USART2_SCK {PIO_PD17B_USART2_SCK2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
|
||||
|
||||
#define PINS_USART2 {PIN_USART2_RXD, PIN_USART2_TXD, PIN_USART2_CTS, \
|
||||
PIN_USART2_RTS, PIN_USART2_SCK}
|
||||
|
||||
/* Synchronous Serial Controller (SSC) */
|
||||
|
||||
#define PIN_SSC0_RD {PIO_PA10C_SSC_RD, PIOA, ID_PIOA, SOC_GPIO_FUNC_C}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue