drivers: serial: usart_sam: rework device tree support

Reworked usart_sam driver to utilize new DT_INST macros as part of
this rework we also now get pin ctrl/mux configuration information
from the device tree instead of via Kconfig and defines in soc_pinmap.h

We remove defines from dts_fixup.h and soc_pinmap.h and associated
Kconfig symbols that are no longer needed due to getting all that
information from devicetree.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-04-09 16:53:17 -05:00 committed by Kumar Gala
commit e7c7f911a9
11 changed files with 48 additions and 312 deletions

View file

@ -11,7 +11,6 @@ CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_USART_SAM=y
CONFIG_USART_SAM_PORT_1=y
CONFIG_BOARD_SAM_E70_XPLAINED=y
CONFIG_WDT_DISABLE_AT_BOOT=y
CONFIG_BUILD_OUTPUT_HEX=y

View file

@ -11,6 +11,5 @@ CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_USART_SAM=y
CONFIG_USART_SAM_PORT_1=y
CONFIG_BOARD_SAM_E70_XPLAINED=y
CONFIG_BUILD_OUTPUT_HEX=y

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@ -11,5 +11,4 @@ CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_USART_SAM=y
CONFIG_USART_SAM_PORT_1=y
CONFIG_WDT_DISABLE_AT_BOOT=y

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@ -11,4 +11,3 @@ CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_USART_SAM=y
CONFIG_USART_SAM_PORT_1=y

View file

@ -3,36 +3,10 @@
# Copyright (c) 2016 Piotr Mienkowski
# SPDX-License-Identifier: Apache-2.0
menuconfig USART_SAM
config USART_SAM
bool "Atmel SAM MCU family USART driver"
depends on SOC_FAMILY_SAM
select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT
help
This option enables the USARTx driver for Atmel SAM MCUs.
# ---------- Port 0 ----------
config USART_SAM_PORT_0
bool "Enable USART0"
depends on USART_SAM
help
Enable USART0 at boot
# ---------- Port 1 ----------
config USART_SAM_PORT_1
bool "Enable USART1"
depends on USART_SAM
help
Enable USART1 at boot
# ---------- Port 2 ----------
config USART_SAM_PORT_2
bool "Enable USART2"
depends on USART_SAM
depends on SOC_SERIES_SAME70 || \
SOC_SERIES_SAMV71
help
Enable USART2 at boot

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@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam_usart
/** @file
* @brief USART driver for Atmel SAM MCU family.
*
@ -19,34 +21,6 @@
#include <soc.h>
#include <drivers/uart.h>
/*
* Verify Kconfig configuration
*/
#if CONFIG_USART_SAM_PORT_0 == 1
#if DT_USART_SAM_PORT_0_BAUD_RATE == 0
#error "DT_USART_SAM_PORT_0_BAUD_RATE has to be bigger than 0"
#endif
#endif
#if CONFIG_USART_SAM_PORT_1 == 1
#if DT_USART_SAM_PORT_1_BAUD_RATE == 0
#error "DT_USART_SAM_PORT_1_BAUD_RATE has to be bigger than 0"
#endif
#endif
#if CONFIG_USART_SAM_PORT_2 == 1
#if DT_USART_SAM_PORT_2_BAUD_RATE == 0
#error "DT_USART_SAM_PORT_2_BAUD_RATE has to be bigger than 0"
#endif
#endif
/* Device constant configuration parameters */
struct usart_sam_dev_cfg {
Usart *regs;
@ -349,125 +323,53 @@ static const struct uart_driver_api usart_sam_driver_api = {
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};
/* USART0 */
#ifdef CONFIG_USART_SAM_PORT_0
#define USART_SAM_DECLARE_CFG(n, IRQ_FUNC_INIT) \
static const struct usart_sam_dev_cfg usart##n##_sam_config = { \
.regs = (Usart *)DT_INST_REG_ADDR(n), \
.periph_id = DT_INST_PROP(n, peripheral_id), \
\
.pin_rx = ATMEL_SAM_DT_PIN(n, 0), \
.pin_tx = ATMEL_SAM_DT_PIN(n, 1), \
\
IRQ_FUNC_INIT \
}
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
/* Forward declare function */
static void usart0_sam_irq_config_func(struct device *port);
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
static const struct usart_sam_dev_cfg usart0_sam_config = {
.regs = USART0,
.periph_id = DT_USART_SAM_PORT_0_PERIPHERAL_ID,
.pin_rx = PIN_USART0_RXD,
.pin_tx = PIN_USART0_TXD,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = usart0_sam_irq_config_func,
#endif
};
static struct usart_sam_dev_data usart0_sam_data = {
.baud_rate = DT_USART_SAM_PORT_0_BAUD_RATE,
};
DEVICE_AND_API_INIT(usart0_sam, DT_USART_SAM_PORT_0_NAME, &usart_sam_init,
&usart0_sam_data, &usart0_sam_config, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &usart_sam_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void usart0_sam_irq_config_func(struct device *port)
{
IRQ_CONNECT(DT_USART_SAM_PORT_0_IRQ,
DT_USART_SAM_PORT_0_IRQ_PRIO,
usart_sam_isr,
DEVICE_GET(usart0_sam), 0);
irq_enable(DT_USART_SAM_PORT_0_IRQ);
}
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
#define USART_SAM_CONFIG_FUNC(n) \
static void usart##n##_sam_irq_config_func(struct device *port) \
{ \
IRQ_CONNECT(DT_INST_IRQN(n), \
DT_INST_IRQ(n, priority), \
usart_sam_isr, \
DEVICE_GET(usart##n##_sam), 0); \
irq_enable(DT_INST_IRQN(n)); \
}
#define USART_SAM_IRQ_CFG_FUNC_INIT(n) \
.irq_config_func = usart##n##_sam_irq_config_func
#define USART_SAM_INIT_CFG(n) \
USART_SAM_DECLARE_CFG(n, USART_SAM_IRQ_CFG_FUNC_INIT(n))
#else
#define USART_SAM_CONFIG_FUNC(n)
#define USART_SAM_IRQ_CFG_FUNC_INIT
#define USART_SAM_INIT_CFG(n) \
USART_SAM_DECLARE_CFG(n, USART_SAM_IRQ_CFG_FUNC_INIT)
#endif
/* USART1 */
#define USART_SAM_INIT(n) \
static struct usart_sam_dev_data usart##n##_sam_data = { \
.baud_rate = DT_INST_PROP(n, current_speed), \
}; \
\
static const struct usart_sam_dev_cfg usart##n##_sam_config; \
\
DEVICE_AND_API_INIT(usart##n##_sam, DT_INST_LABEL(n), \
&usart_sam_init, &usart##n##_sam_data, \
&usart##n##_sam_config, PRE_KERNEL_1, \
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
&usart_sam_driver_api); \
\
USART_SAM_CONFIG_FUNC(n) \
\
USART_SAM_INIT_CFG(n)
#ifdef CONFIG_USART_SAM_PORT_1
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
/* Forward declare function */
static void usart1_sam_irq_config_func(struct device *port);
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
static const struct usart_sam_dev_cfg usart1_sam_config = {
.regs = USART1,
.periph_id = DT_USART_SAM_PORT_1_PERIPHERAL_ID,
.pin_rx = PIN_USART1_RXD,
.pin_tx = PIN_USART1_TXD,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = usart1_sam_irq_config_func,
#endif
};
static struct usart_sam_dev_data usart1_sam_data = {
.baud_rate = DT_USART_SAM_PORT_1_BAUD_RATE,
};
DEVICE_AND_API_INIT(usart1_sam, DT_USART_SAM_PORT_1_NAME, &usart_sam_init,
&usart1_sam_data, &usart1_sam_config, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &usart_sam_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void usart1_sam_irq_config_func(struct device *port)
{
IRQ_CONNECT(DT_USART_SAM_PORT_1_IRQ,
DT_USART_SAM_PORT_1_IRQ_PRIO,
usart_sam_isr,
DEVICE_GET(usart1_sam), 0);
irq_enable(DT_USART_SAM_PORT_1_IRQ);
}
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
#endif
/* USART2 */
#ifdef CONFIG_USART_SAM_PORT_2
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
/* Forward declare function */
static void usart2_sam_irq_config_func(struct device *port);
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
static const struct usart_sam_dev_cfg usart2_sam_config = {
.regs = USART2,
.periph_id = DT_USART_SAM_PORT_2_PERIPHERAL_ID,
.pin_rx = PIN_USART2_RXD,
.pin_tx = PIN_USART2_TXD,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = usart2_sam_irq_config_func,
#endif
};
static struct usart_sam_dev_data usart2_sam_data = {
.baud_rate = DT_USART_SAM_PORT_2_BAUD_RATE,
};
DEVICE_AND_API_INIT(usart2_sam, DT_USART_SAM_PORT_2_NAME, &usart_sam_init,
&usart2_sam_data, &usart2_sam_config, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &usart_sam_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void usart2_sam_irq_config_func(struct device *port)
{
IRQ_CONNECT(DT_USART_SAM_PORT_2_IRQ,
DT_USART_SAM_PORT_2_IRQ_PRIO,
usart_sam_isr,
DEVICE_GET(usart2_sam), 0);
irq_enable(DT_USART_SAM_PORT_2_IRQ);
}
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
#endif
DT_INST_FOREACH(USART_SAM_INIT)

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@ -15,44 +15,6 @@
#include <soc.h>
/* Universal Synchronous Asynchronous Receiver Transmitter (USART) */
#define PIN_USART0_RXD {PIO_PA10A_RXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART0_TXD {PIO_PA11A_TXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART0_CTS {PIO_PB26A_CTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
#define PIN_USART0_RTS {PIO_PB25A_RTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
#define PIN_USART0_SCK {PIO_PA17B_SCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
#define PINS_USART0 {PIN_USART0_RXD, PIN_USART0_TXD, PIN_USART0_CTS, \
PIN_USART0_RTS, PIN_USART0_SCK}
#define PIN_USART1_RXD {PIO_PA12A_RXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_TXD {PIO_PA13A_TXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_CTS {PIO_PA15A_CTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_RTS {PIO_PA14A_RTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_SCK {PIO_PA16A_SCK1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PINS_USART1 {PIN_USART1_RXD, PIN_USART1_TXD, PIN_USART1_CTS, \
PIN_USART1_RTS, PIN_USART1_SCK}
#define PIN_USART2_RXD {PIO_PB21A_RXD2, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
#define PIN_USART2_TXD {PIO_PB20A_TXD2, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
#define PIN_USART2_CTS {PIO_PB23A_CTS2, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
#define PIN_USART2_RTS {PIO_PB22A_RTS2, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
#define PIN_USART2_SCK {PIO_PB24A_SCK2, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
#define PINS_USART2 {PIN_USART2_RXD, PIN_USART2_TXD, PIN_USART2_CTS, \
PIN_USART2_RTS, PIN_USART2_SCK}
#define PIN_USART3_RXD {PIO_PD5B_RXD3, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_USART3_TXD {PIO_PD4B_TXD3, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_USART3_CTS {PIO_PF4A_CTS3, PIOF, ID_PIOF, SOC_GPIO_FUNC_A}
#define PIN_USART3_RTS {PIO_PF5A_RTS3, PIOF, ID_PIOF, SOC_GPIO_FUNC_A}
#define PIN_USART3_SCK {PIO_PE16B_SCK3, PIOE, ID_PIOE, SOC_GPIO_FUNC_B}
#define PINS_USART3 {PIN_USART3_RXD, PIN_USART3_TXD, PIN_USART3_CTS, \
PIN_USART3_RTS, PIN_USART3_SCK}
/* Two-wire Interface (TWI) */
#define PIN_TWI0_TWCK {PIO_PA18A_TWCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}

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@ -17,26 +17,6 @@
#include <soc.h>
/* Universal Synchronous Asynchronous Receiver Transmitter (USART) */
#define PIN_USART0_RXD {PIO_PB0C_RXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_TXD {PIO_PB1C_TXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_CTS {PIO_PB2C_CTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_RTS {PIO_PB3C_RTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_SCK {PIO_PB13C_SCK0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PINS_USART0 {PIN_USART0_RXD, PIN_USART0_TXD, PIN_USART0_CTS, \
PIN_USART0_RTS, PIN_USART0_SCK}
#define PIN_USART1_RXD {PIO_PA21A_RXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_TXD {PIO_PA22A_TXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_CTS {PIO_PA25A_CTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_RTS {PIO_PA24A_RTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_SCK {PIO_PA23A_SCK1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PINS_USART1 {PIN_USART1_RXD, PIN_USART1_TXD, PIN_USART1_CTS, \
PIN_USART1_RTS, PIN_USART1_SCK}
/* Two-wire Interface (TWI) */
#define PIN_TWI0_TWCK {PIO_PA4A_TWCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}

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@ -16,26 +16,6 @@
#include <soc.h>
/* Universal Synchronous Asynchronous Receiver Transmitter (USART) */
#define PIN_USART0_RXD {PIO_PA5A_RXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART0_TXD {PIO_PA6A_TXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART0_CTS {PIO_PA8A_CTS0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART0_RTS {PIO_PA7A_RTS0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART0_SCK {PIO_PA2B_SCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
#define PINS_USART0 {PIN_USART0_RXD, PIN_USART0_TXD, PIN_USART0_CTS, \
PIN_USART0_RTS, PIN_USART0_SCK}
#define PIN_USART1_RXD {PIO_PA21A_RXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_TXD {PIO_PA22A_TXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_CTS {PIO_PA25A_CTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_RTS {PIO_PA24A_RTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_SCK {PIO_PA23A_SCK1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PINS_USART1 {PIN_USART1_RXD, PIN_USART1_TXD, PIN_USART1_CTS, \
PIN_USART1_RTS, PIN_USART1_SCK}
/* Two-wire Interface (TWI) */
#define PIN_TWI0_TWCK {PIO_PA4A_TWCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}

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@ -30,35 +30,6 @@
#define PINS_GMAC0 {PIN_GMAC_SET1}
/* Universal Synchronous Asynchronous Receiver Transmitter (USART) */
#define PIN_USART0_RXD {PIO_PB0C_USART0_RXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_TXD {PIO_PB1C_USART0_TXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_CTS {PIO_PB2C_USART0_CTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_RTS {PIO_PB3C_USART0_RTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_SCK {PIO_PB13C_USART0_SCK0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PINS_USART0 {PIN_USART0_RXD, PIN_USART0_TXD, PIN_USART0_CTS, \
PIN_USART0_RTS, PIN_USART0_SCK}
#define PIN_USART1_RXD {PIO_PA21A_USART1_RXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_TXD {PIO_PB4D_USART1_TXD1, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
#define PIN_USART1_CTS {PIO_PA25A_USART1_CTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_RTS {PIO_PA24A_USART1_RTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_SCK {PIO_PA23A_USART1_SCK1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PINS_USART1 {PIN_USART1_RXD, PIN_USART1_TXD, PIN_USART1_CTS, \
PIN_USART1_RTS, PIN_USART1_SCK}
#define PIN_USART2_RXD {PIO_PD15B_USART2_RXD2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_USART2_TXD {PIO_PD16B_USART2_TXD2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_USART2_CTS {PIO_PD19B_USART2_CTS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_USART2_RTS {PIO_PD18B_USART2_RTS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_USART2_SCK {PIO_PD17B_USART2_SCK2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PINS_USART2 {PIN_USART2_RXD, PIN_USART2_TXD, PIN_USART2_CTS, \
PIN_USART2_RTS, PIN_USART2_SCK}
/* Synchronous Serial Controller (SSC) */
#define PIN_SSC0_RD {PIO_PA10C_SSC_RD, PIOA, ID_PIOA, SOC_GPIO_FUNC_C}

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@ -31,35 +31,6 @@
#define PINS_GMAC0 {PIN_GMAC_SET1}
/* Universal Synchronous Asynchronous Receiver Transmitter (USART) */
#define PIN_USART0_RXD {PIO_PB0C_USART0_RXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_TXD {PIO_PB1C_USART0_TXD0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_CTS {PIO_PB2C_USART0_CTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_RTS {PIO_PB3C_USART0_RTS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PIN_USART0_SCK {PIO_PB13C_USART0_SCK0, PIOB, ID_PIOB, SOC_GPIO_FUNC_C}
#define PINS_USART0 {PIN_USART0_RXD, PIN_USART0_TXD, PIN_USART0_CTS, \
PIN_USART0_RTS, PIN_USART0_SCK}
#define PIN_USART1_RXD {PIO_PA21A_USART1_RXD1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_TXD {PIO_PB4D_USART1_TXD1, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
#define PIN_USART1_CTS {PIO_PA25A_USART1_CTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_RTS {PIO_PA24A_USART1_RTS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PIN_USART1_SCK {PIO_PA23A_USART1_SCK1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
#define PINS_USART1 {PIN_USART1_RXD, PIN_USART1_TXD, PIN_USART1_CTS, \
PIN_USART1_RTS, PIN_USART1_SCK}
#define PIN_USART2_RXD {PIO_PD15B_USART2_RXD2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_USART2_TXD {PIO_PD16B_USART2_TXD2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_USART2_CTS {PIO_PD19B_USART2_CTS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_USART2_RTS {PIO_PD18B_USART2_RTS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PIN_USART2_SCK {PIO_PD17B_USART2_SCK2, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
#define PINS_USART2 {PIN_USART2_RXD, PIN_USART2_TXD, PIN_USART2_CTS, \
PIN_USART2_RTS, PIN_USART2_SCK}
/* Synchronous Serial Controller (SSC) */
#define PIN_SSC0_RD {PIO_PA10C_SSC_RD, PIOA, ID_PIOA, SOC_GPIO_FUNC_C}