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Filip Kokosinski 70c978bb97 soc/riscv/sifive-freedom/fe310: use correct SYS_CLOCK_HW_CYCLES_PER_SEC 
This commit introduces changes in three places in order to fix the
problem with timer-related tests on FE310-based boards:
* tests/kernel/sleep/kernel.common.timing
* tests/kernel/tickless/tickless_concept/kernel.tickless.concept
* tests/kernel/workq/work_queue/kernel.workqueue

The first change is the modification of the SYS_CLOCK_HW_CYCLES_PER_SEC
value back to 32768 Hz to match FE310's datasheet description.

The second change is CLINT frequency reduction in Renode simulation
model to 16 MHz to correspond with the oscillator frequency given by the
FE310's datasheet and the HiFive1 board schematic. This fixes the first
two tests.

The last change is reducing the MIN_DELAY define to 100. This causes the
RISC-V machine timer driver to update the mtimecmp register more often,
which in turn addresses the `work_queue/kernel.workqueue` problem with
work items finishing prematurely, causing the above-mentioned test to
fail.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-05-24 08:58:43 -07:00
..
arc ARC: boards: allow MWDT toolchain for nsim_hs6x and nsim_hs6x_smp 2022-05-10 14:12:25 -04:00
arm arm: stm32h7: Enable DCache when CONFIG_DCACHE is defined 2022-05-24 08:47:20 -07:00
arm64 boards: imx8mm: add partial pin control support 2022-05-12 16:57:17 -05:00
mips asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
nios2 linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
posix linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
riscv soc/riscv/sifive-freedom/fe310: use correct SYS_CLOCK_HW_CYCLES_PER_SEC 2022-05-24 08:58:43 -07:00
sparc linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
x86 linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
xtensa soc: esp32: move libc strings in dram area 2022-05-20 12:36:36 +02:00
Kconfig kconfig: soc and shield cleanup 2021-06-11 16:13:22 +02:00