Anas Nashif dbfbf0edba xtensa: adapt soc code to use prep_c ... Many xtensa target jump from soc code directly into cstart and depend on architecture code being initialized in arch_kernel_init(). Instead of jumping to cstart, jump to newly introduced prep_c similar to all other architectures, where common platfotm initialization will happen. Signed-off-by: Anas Nashif <anas.nashif@intel.com>		2024-08-07 13:50:53 +02:00
..
common	soc: espressif: disable RNG entropy before app runs	2024-07-11 16:19:55 -04:00
esp32	xtensa: adapt soc code to use prep_c	2024-08-07 13:50:53 +02:00
esp32c3	soc: espressif: disable RNG entropy before app runs	2024-07-11 16:19:55 -04:00
esp32c6	soc/espressif/esp32c6: Do not set HAS_PM or HAS_POWEROFF	2024-07-16 12:53:09 -04:00
esp32s2	xtensa: adapt soc code to use prep_c	2024-08-07 13:50:53 +02:00
esp32s3	xtensa: adapt soc code to use prep_c	2024-08-07 13:50:53 +02:00
CMakeLists.txt
Kconfig	soc: esp32xx: refactor clock and RTC subsystems	2024-05-27 01:37:18 -07:00
Kconfig.defconfig
Kconfig.soc
soc.yml	soc: espressif: add esp32-c6 support	2024-06-14 18:51:46 -04:00