zephyr/soc
Immo Birnbaum f668474e4d soc: arm: dts: arm: xilinx: Zynq-7000 SoC init code, device tree data
Add SoC-specific code, the basic device tree and Kconfig data as well
as the corresponding linker command file for the Xilinx Zynq-7000
family of SoCs. This SoC - either as a QEMU simulation or on actual
hardware such as the Avnet/Digilent ZedBoard - is suitable as an ini-
tial target for the ARMv7 Cortex-A support.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-10-28 15:26:50 +02:00
..
arc boards: arc: add a nsim_hs_mpuv6 board simulator 2021-08-27 11:45:43 -04:00
arm soc: arm: dts: arm: xilinx: Zynq-7000 SoC init code, device tree data 2021-10-28 15:26:50 +02:00
arm64 soc: arm64: Add Kconfig files for Intel SoC FPGA 2021-10-12 08:37:03 -04:00
nios2 soc: nios2: Cleanup linker scripts to use new DTS macros 2020-04-30 20:59:13 -05:00
posix posix: Add missing include 2021-04-27 13:17:36 -04:00
riscv soc: riscv: esp32c3: drivers: flash: add support 2021-10-28 06:47:21 -04:00
sparc boards: set CPU_HAS_FPU on LEON3 soc and boards 2020-12-04 14:33:43 +02:00
x86 bluetooth: remove Kconfig options CONFIG_BT_*_ON_DEV_NAME 2021-08-25 18:05:17 -04:00
xtensa soc: esp32s2: drivers: flash: add support 2021-10-28 06:47:21 -04:00
Kconfig kconfig: soc and shield cleanup 2021-06-11 16:13:22 +02:00