These are very similar devices to mt8195, minimal changes needed beyond boilerplate configuration. In the process, this reworks the board/soc layout to be HWMv2 compliant, with "adsp" becoming a CPU cluster beneath the SOC. So the name of the boards to west become e.g. "mt8195/mt8195/adsp" (which can be shortened to "mt8195//adsp" if desired). Note that the cpuclk driver is not yet ported, it works only with 8195 (the clocking/power architecture seems similar between the parts, but the graph of wells and clocks is different and historically these have been three separate drivers in SOF). The biggest changes are in the image/loader scripts, which needed some rework for cross-device portability. Signed-off-by: Andy Ross <andyross@google.com>
29 lines
833 B
C
29 lines
833 B
C
/* Copyright 2023 The ChromiumOS Authors
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_MTK_SOC_H
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#define ZEPHYR_SOC_MTK_SOC_H
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#include <zephyr/device.h>
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void mtk_adsp_cpu_freq_init(void);
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void mtk_adsp_set_cpu_freq(int mhz);
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/* Mailbox Driver: */
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/* Hardware defines multiple "channel" bits that can be independently
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* signaled and cleared. An interrupt is latched if any bits are
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* set.
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*/
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#define MTK_ADSP_MBOX_CHANNELS 5
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typedef void (*mtk_adsp_mbox_handler_t)(const struct device *mbox, void *arg);
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void mtk_adsp_mbox_set_handler(const struct device *mbox, uint32_t chan,
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mtk_adsp_mbox_handler_t handler, void *arg);
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/* Signal an interrupt on the specified channel for the other side */
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void mtk_adsp_mbox_signal(const struct device *mbox, uint32_t chan);
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#endif /* ZEPHYR_SOC_MTK_SOC_H */
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