4b27b5494f
I think my original idea with this default MPU setup was that the top bits of the (fast) SRAM region might be useful for host DMA that needed better latencies than the (extremely slow) system DRAM mappings. So it should be left uncached for safety. But unfortunately the author[1] of the SOF heap integration for this platform decided to size the heap dynamically to use most of the SRAM block (the vectors and a few other bits live at the bottom, but most of .text is in DRAM). Needless to say, an uncached heap is sort of a performance disaster. It worked OK for default copy-only topologies but fell over the moment we turned on nontrivial processing. [1] Um... Hi. Yeah, that's me too. Signed-off-by: Andy Ross <andyross@google.com> |
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| .. | ||
| mt8186 | ||
| mt8188 | ||
| mt8195 | ||
| mt8196 | ||
| CMakeLists.txt | ||
| cpuclk.c | ||
| gen_img.py | ||
| irq.c | ||
| Kconfig | ||
| Kconfig.defconfig | ||
| Kconfig.soc | ||
| linker.ld | ||
| mbox.c | ||
| mtk_adsp_load.py | ||
| soc.c | ||
| soc.h | ||
| soc.yml | ||